Samsung Display Co., Ltd.

Taehoon Kwon

Seungkyu Lee

Byungsun Kim

Ji-Hyun Ka

Kimyeong Eom

Wonkyu Kwak

Choonghee Oh

Ji-Eun Lee

Hyungjun Park

Nuree Um

Sukyoung Kim

Minhee Choi

Jintae Jeong

Min Jeong Kim

Jun-yong An

Hwayoung Song

Kyonghwan Oh

Mina Kim

Ahyoung Kim

Kyung-hoon Kim

A display device including a substrate, a plurality of first data lines and a plurality of second data lines. The substrate includes a display area, in which a hole is formed, and a hole edge area surrounding the hole. The plurality of first data lines are disposed on the substrate, extend in a first direction in the display area, are arranged in a second direction orthogonal to the first direction, and bypass the hole along the hole edge area. The plurality of second data lines are disposed on the substrate, extend in the first direction in the display area, are arranged adjacent to the plurality of first data lines, and bypass the hole along hole edge area. In the hole edge area, each of the plurality of first data lines and the plurality of second data lines are disposed on three layers different from each other.

Display device having a hole formed in a display area

A driver is disposed in a display panel, and includes a plurality of stages. At least one stage of the plurality of stages includes an input circuit which transfers an input signal to a first node in response to at least one of a clock signal and an inverted clock signal, and inverters which generate an output signal based on a voltage of the first node. At least one of the inverters includes a p-type metal-oxide-semiconductor ('PMOS') transistor and an n-type metal-oxide-semiconductor (“NMOS”) transistor connected in series between a line transferring a relatively high gate voltage and a line transferring a relatively low gate voltage. A first active region of the PMOS transistor includes a material different from a material of a second active region of the NMOS transistor.

Driver and display device

A display device includes a first pixel row, a first first-structure transmission line, a first second-structure transmission line, a first transistor, and a second transistor. The first pixel row includes a first first-color sub-pixel and a second first-color sub-pixel both for displaying a first color. The first second-structure transmission line neighbors the first first-structure transmission line with no intervening transmission line analogous to the first first-structure transmission line or the first second-structure transmission line being disposed between the first first-structure transmission line and the first second-structure transmission line. The first transistor is electrically connected through the first first-structure transmission line to the first first-color sub-pixel and receives a first test voltage. The second transistor is electrically connected through the first second-structure transmission line to the second first-color sub-pixel and receives a second test voltage different from the first test voltage.

Display panel test circuit and display device including the same

A display device includes: a plurality of pixels each including a driving thin film transistor and a storage capacitor, wherein each of the pixels further includes: a driving semiconductor layer including a driving channel region, a driving source region, and a driving drain region; a first electrode layer, a portion of the first electrode layer overlapping the driving channel region; a second electrode layer overlapping the first electrode layer; a node connection line having a first side connected to the first electrode layer; a pixel electrode overlapping the first electrode layer and the second electrode layer; and a shielding layer between the first electrode layer and the pixel electrode and overlapping the first electrode layer, the node connection fine, and the pixel electrode.

Display device with a driving voltage line that overlaps a transistor and a pixel electrode

A display device includes: a display panel; and an inspection circuit at a non-display area. The display panel includes: first data lines at a display area; first connection lines at the non-display area; second data lines at the display area; and second connection lines at the non-display area. The inspection circuit includes: first transistors to be controlled by a first inspection signal of a first inspection line; second transistors to be controlled by a second inspection signal of a second inspection line; third transistors to be controlled by a third inspection signal of a third inspection line; fourth transistors to be controlled by a fourth inspection signal of a fourth inspection line; fifth transistors to be controlled by a fifth inspection signal of a fifth inspection line; and sixth transistors to be controlled by a sixth inspection signal of a sixth inspection line.

Display device

A display device includes: a base layer comprising a first portion, a second portion extending from the first portion, and a third portion extending from the second portion; a first light emitting element disposed on the first portion; a first front signal line electrically connected to the first light emitting element and disposed on the first portion; a second front signal line electrically connected to the first front signal line, disposed on the first portion, disposed in a different layer from the first front signal line, and overlapping the first front signal line; a first connection line electrically connected to the first and second front signal lines, disposed on the second portion, and disposed in a different layer from the first and second front signal lines; and a first rear signal line electrically connected to the first connection line and disposed on the third portion.

A display device includes: a plurality of pixels each including a driving thin film transistor and a storage capacitor, wherein each of the pixels further includes: a driving semiconductor layer including a driving channel region, a driving source region, and a driving drain region; a first electrode layer, a portion of the first electrode layer overlapping the driving channel region; a second electrode layer overlapping the first electrode layer; a node connection line having a first side connected to the first electrode layer; a pixel electrode overlapping the first electrode layer and the second electrode layer; and a shielding layer between the first electrode layer and the pixel electrode and overlapping the first electrode layer, the node connection line, and the pixel electrode.

Display device including a conductive layer overlapping a driving voltage line

A display apparatus includes a substrate which includes a first pixel area and a second pixel area. A third pixel area is spaced apart from the second pixel area. A notch peripheral area is adjacent to the first, second and third pixel areas. A plurality of pixels are provided in the first, second and third pixel areas. A first scan line is disposed on the substrate. The first scan line includes a first portion disposed in the second pixel area, a second portion disposed in the third pixel area, and a third portion which connects the first portion to the second portion. The third portion is disposed in the notch peripheral area. A second scan line is disposed on the substrate in the first pixel area. A surface area of the first scan line is from about 90% to about 110% of a surface area of the second scan line.

Display apparatus having a notch

A display device includes: a plurality of pixels each including a driving thin film transistor and a storage capacitor, wherein each of the pixels further includes: a driving semiconductor layer including a driving channel region, a driving source region, and a driving drain region; a first electrode layer, a portion of the first electrode layer overlapping the driving channel region; a second electrode layer overlapping the first electrode layer; a node connection line having a first side connected to the first electrode layer: a pixel electrode overlapping the first electrode layer and the second electrode layer; and a shielding layer between the first electrode layer and the pixel electrode and overlapping the first electrode layer, the node connection line, and the pixel electrode.

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the display includes a driving transistor having a gate electrode electrically connected to a first node and configured to supply a driving current to an OLED based on a voltage of the gate electrode. A storage capacitor electrically connects to the first node and is configured to maintain a constant voltage at the first node. A switching transistor electrically connects to the first node and includes a pair of transistors that are configured to be simultaneously turned on based on a first control signal. The transistors are serially connected to each other via a second node, and a current path circuit electrically connects to the second node and is configured to receive a charge stored in a capacitance of the second node when the switching transistor is turned off.

Organic light-emitting diode display

An organic light-emitting diode (OLED) display is disclosed. In one aspect, the OLED display includes a display unit and a plurality of pixels over the display unit. Each of the pixels comprises first and second sub-pixels each comprising an OLED and a pixel circuit. Each pixel circuit is connected to a first node and a first control line that is configured to supply a first control signal having a rising edge prior to a time when the OLED emits light in a frame. Each pixel circuit is further connected to a second node and a light emitting signal line that is configured to supply a light emitting signal having a falling edge prior to a time when the OLED emits light in the frame. The pixel circuit of the first sub-pixel comprises a first timing compensating capacitor connecting the first node and an anode of the OLED.

Growing community of inventors

Yongin-si, South Korea

Taehoon Kwon