Samsung Electronics Co., Ltd.

Taec-Jun Kim

Kwanhyo Kim

Wan-Soo Choi

Jae-Hwa Lee

Sang-Wook Nam

A nonvolatile memory device that includes a memory cell array including a plurality of nonvolatile memory cells; a page buffer circuit connected to the memory cell array; a status data memory circuit storing a first plurality of status data items; a control logic circuit controlling the status data memory circuit to accumulate the first plurality of status data items in the page buffer circuit, in response to a first status data group read command provided from an external device; and an input/output circuit outputting the first plurality of status data items accumulated in the page buffer circuit to the external device.

Nonvolatile memory device and operation method thereof, and storage device including the same

A controller of a storage system, includes a plurality of modules each including an intellectual property (IP) module and a core module, wherein, based on the IP module operating as a master for a first module of the plurality of modules, an idle clock of the first module is a first clock, wherein based on the core module operating as a master for a second module of the plurality of modules, an idle clock of the second module is a second clock, wherein a clock frequency of the first clock is greater than zero and smaller than a maximum clock frequency, and wherein a clock frequency of the second clock is zero.

Method for controlling clock of controller and storage system

A program method of a multi-bit memory device is provided. First page data is programmed in a first region of a memory cell array. The first page data is stored in a first buffer of a page buffer. Second page data is programmed in the first region of the memory cell array. The second page data is stored in a third buffer of the page buffer. Third page data is stored in the first region of the memory cell array. The second page data stored in the third buffer is transferred to a second buffer of the page buffer and the third page data is stored in the third buffer. The first to third page data stored in page buffer are programmed in a second region of the memory cell array.

Growing community of inventors

Seoul, South Korea

Taec-Jun Kim