Nec Lcd Technologies, Ltd.

Nec Corporation

Tae Yoshikawa

Hiroaki Tanaka

Takasuke Hayase

Satoshi Ihida

Hiroyuki Uchida

Michiaki Sakamoto

Shigeru Kimura

Takahiko Watanabe

Kazushige Takechi

Tsutomu Hamada

Akitoshi Maeda

Shinichi Nakata

Shusaku Kido

Hirofumi Ihara

Hiroshi Kanou

Satoshi Doi

Wakahiko Kaneko

Hirotaka Yamaguchi

Shouichi Kuroha

Toshihiko Harano

Hisanobu Shimodouzono

The TFT substrate of an LCD device has an array of pixel electrodes defined by a plurality of signal lines and a plurality of scanning lines. Each terminal of the scanning lines includes a first metallic pattern, a second metallic pattern in contact with the first metallic pattern through a first via hole, and an ITO pattern in contact with the second metallic pattern through a second via hole. The ITO pattern has a width smaller than the width of the first via hole and larger than the second via hole, thereby providing the TFT substrate with a smaller level difference. The smaller level difference prevents the dust generated during a rubbing treatment from attaching onto the TFT substrate.

LCD device having a smaller level difference

An active matrix substrate of a channel protection type having a gate electrode, a drain electrode and a pixel electrode is isolated in each layer by insulating films. The active matrix substrate is to be prepared by four masks. A gate electrode layer, a gate insulating film and an a-Si layer are processed to the same shape on a transparent insulating substrate to form a gate electrode layer and a TFF area. A drain electrode layer is formed by a first passivation film with the first passivation film formed as an upper layer. In a second passivation film, formed above the first passivation film, are bored a first opening through the first and second passivation films and a second opening through the second passivation film. A wiring connection layer is formed by ITO provided as an uppermost layer. A storage capacitance unit, including the first and second passivation films sandwiched between the gate electrode and an electrode layer formed as a co-layer with respect to the gate electrode, is connected to the pixel electrode.

Active matrix substrate and manufacturing method therefor

An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and namorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the namorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.

Active matrix substrate plate and manufacturing method therefor

An active matrix substrate of a channel protection type having a gate electrode, a drain electrode and a pixel electrode isolated from one another from layer to layer by insulating films. The active matrix substrate is to be prepared by four masks. A gate electrode layer, a gate insulating film and an a-Si layer are processed to the same shape on a transparent insulating substrate to form a gate electrode layer ( of FIG. ) and a TFF area. A drain electrode layer ( of FIG. ) is formed by a first passivation film ( of FIG. ) via a first passivation film ( of FIG. ) formed as an upper layer. In a second passivation film ( of FIG. ) formed above it are bored an opening through the first and second passivation films and an opening through the second passivation film. A wiring connection layer is formed by ITO ( of FIG. ) provided as an uppermost layer. A storage capacitance unit, comprised of the first and second passivation films sandwiched between the gate electrode and an electrode layer formed as a co-layer with respect to the gate electrode, is provided in the pixel electrode.

An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step , the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step , the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step , the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n amorphous silicon layer of the channel gap is removed by etching. In step , the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.

Manufacturing method of active matrix substrate plate and manufacturing method therefor

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Tokyo, Japan

Tae Yoshikawa