Samsung Electronics Co., Ltd.

Korea University Research and Business Foundation

Tae-Yeong Kim

Pil-Kyu Kang

Seok-Ho Kim

Byung-Lyul Park

Ho-jin Lee

Jun-Hyung Kim

Sung-hyup Kim

Kwang-Jin Moon

Joo-Hee Jang

Hyo-Ju Kim

Hoon-Joo Na

Kyu-ha Lee

Jin-Ho An

Hoe-Chul Kim

Gil-heyun Choi

Jin-ho Park

Jun-hyung Kim

Inkyu Lee

Tae-Seok Oh

Deok-Young Jung

Jin-ho Chun

Jong-Ho Oh

Yeun-Sang Park

Yi-Koan Hong

Jum-yong Park

Bong-Jin Kim

Min-Ki Ahn

Na-ein Lee

Seok-Ju Jang

Kyeong-Bin Lim

A substrate bonding apparatus includes a substrate susceptor to support a first substrate, a substrate holder over the substrate susceptor to hold a second substrate, the substrate holder including a plurality of independently moveable holding fingers, and a chamber housing to accommodate the substrate susceptor and the substrate holder.

Method of bonding substrates utilizing a substrate holder with holding fingers

Apparatus for bonding substrates having a substrate holder with holding fingers and method of bonding substrates

A semiconductor laser device may include a first cladding on a substrate, an optical waveguide on the first cladding, a laser light source chip on the optical waveguide to generate a laser beam, a first adhesive layer between the optical waveguide and the laser light source chip, and a second adhesive layer covering a sidewall of the laser light source chip.

Semiconductor laser device

A wafer bonding apparatus includes a first bonding chuck to fix a first wafer on a first surface thereof, a second bonding chuck to fix a second wafer on a second surface thereof facing the first surface, a bonding initiation member at a center of the first bonding chuck to push the first wafer towards the second surface, and a membrane member including a protrusion protruding from a center portion of the second surface towards the first surface, and a planar portion defining the protrusion on an outer region surrounding the center portion.

Wafer bonding apparatus and wafer bonding system using the same

A wafer bonding apparatus including: a lower chuck to which a lower wafer is secured at a peripheral portion of the lower chuck; an upper chuck to which an upper wafer is secured; a bonding initiator for pressuring a central portion of the upper wafer until the central portion of the upper wafer reaches a central portion of the lower wafer, thereby initiating a bonding process of the upper and the lower wafers by deforming the upper wafer; and a bonding controller for controlling a bonding speed between a peripheral portion of the upper wafer and a peripheral portion of the lower wafer such that the upper wafer becomes un-deformed prior to bonding the peripheral portion of the upper wafer and the peripheral portion of the lower wafer.

Wafer bonding apparatus for directly bonding wafers and a wafer bonding system having the same

A substrate bonding apparatus and a method of bonding substrates, the apparatus including an upper chuck securing a first substrate onto a lower surface thereof such that the first substrate is downwardly deformed into a concave surface profile; a lower chuck arranged under the upper chuck and securing a second substrate onto an upper surface thereof such that the second substrate is upwardly deformed into a convex surface profile; and a chuck controller controlling the upper chuck and the lower chuck to secure the first substrate and the second substrate, respectively, and generating a shape parameter for changing a shape of the second substrate to the convex surface profile from a flat surface profile.

Substrate bonding apparatus

Provided are a wafer bonding apparatus for accurately detecting a bonding state of wafers in a wafer bonding process and/or in a wafer bonding system including the wafer bonding apparatus. The wafer bonding apparatus includes a first supporting plate including a first surface and vacuum grooves for vacuum-absorption of a first wafer disposed on the first surface, a second supporting plate including a second surface facing the first surface. A second wafer is on the second surface. The wafer bonding apparatus and/or the wafer bonding system include a bonding initiator at a center portion of the first supporting plate, and an area sensor on the first supporting plate and configured to detect a propagation state of bonding between the first wafer and the second wafer.

Wafer bonding apparatus and wafer bonding system including the same

The present invention relates to a 5th-generation (5G) or pre-5G communication system which is provided for supporting a higher data transfer rate after a 4th-generation (4G) communication system such as a long term evolution (LTE). The present invention provides a method for selecting, by an access point (AP), a beam in a communication system supporting a beamforming scheme, the method comprising: a step of transmitting information which indicates whether or not a duplicated beacon transmission interval (BTI) is operated; and a step of performing a transmit sector sweep (TXSS) process at least twice during the duplicated BTI.

Apparatus and method for selecting beam pattern in communication system supporting beamforming scheme

A wafer-to-wafer bonding structure includes a first wafer including a first conductive pad in a first insulating layer and a first barrier layer surrounding a lower surface and side surfaces of the first conductive pad, a second wafer including a second conductive pad in a second insulating layer and a second barrier layer surrounding a lower surface and side surfaces of the second conductive pad, the second insulating layer being bonded to the first insulating layer, and at least a portion of an upper surface of the second conductive pad being partially or entirely bonded to at least a portion of an upper surface of the first conductive pad, and a third barrier layer between portions of the first and second wafers where the first and second conductive pads are not bonded to each other.

Wafer-to-wafer bonding structure

A multi-stacked device includes a lower device having a lower substrate, a first insulating layer on the lower substrate, and a through-silicon-via (TSV) pad on the first insulating layer, an intermediate device having an intermediate substrate, a second insulating layer on the intermediate substrate, and a first TSV bump on the second insulating layer, an upper device having an upper substrate, a third insulating layer on the upper substrate, a second TSV bump on the third insulating layer, and a TSV structure passing through the upper substrate, the third insulating layer, the second insulating layer, and the intermediate substrate to be connected to the first TSV bump, the second TSV bump, and the TSV pad. An insulating first TSV spacer between the intermediate substrate and the TSV structure and an insulating second TSV spacer between the upper substrate and the TSV structure are spaced apart along a stacking direction.

Multi-stacked device having TSV structure

A first insulating layer is formed on a substrate. An opening is formed in the first insulating layer. A barrier layer is formed on the first insulating layer and conforming to sidewalls of the first insulating layer in the opening, and a conductive layer is formed on the barrier layer. Chemical mechanical polishing is performed to expose the first insulating layer and leave a barrier layer pattern in the opening and a conductive layer pattern on the barrier layer pattern in the opening, wherein a portion of the conductive layer pattern protrudes above an upper surface of the insulating layer and an upper surface of the barrier layer pattern. A second insulating layer is formed on the first insulating layer, the barrier layer pattern and the conductive layer pattern and planarized to expose the conductive layer pattern. A second substrate may be bonded to the exposed conductive layer pattern.

Method of fabricating multi-substrate semiconductor devices

Wafer processing methods are provided. The methods may include cutting respective edges of a wafer and an adhesive a predetermined angle before grinding a back surface of the wafer.

Wafer processing methods

Semiconductor devices are provided. A semiconductor device includes a substrate, a first conductive structure on the substrate, and a second conductive structure on the first conductive structure. The semiconductor device includes first and second metal-diffusion-blocking layers on respective sidewalls of the first and second conductive structures. The semiconductor device includes an insulating layer between the first and second metal-diffusion-blocking layers. Moreover, the semiconductor device includes a metal-diffusion-shield pattern in the insulating layer and spaced apart from the first conductive structure.

Semiconductor devices

In a method, a first opening is formed in a first insulating interlayer on a first substrate. A first conductive pattern structure contacting a first diffusion prevention insulation pattern and having a planarized top surface is formed in the first opening. Likewise, a second conductive pattern structure contacting a second diffusion prevention insulation pattern is formed in a second insulating interlayer on a second substrate. A plasma treatment process is performed on at least one of the first and second substrates having the first and second conductive pattern structures thereon, respectively. The first and second conductive pattern structures are contacted to each other to bond the first and second substrates.

Method of manufacturing a semiconductor device

Semiconductor device including through via structure and redistribution structures is provided. The semiconductor device may include internal circuits on a first side of a substrate, a through via structure vertically penetrating the substrate to be electrically connected to one of the internal circuits, a redistribution structure on a second side of the substrate and electrically connected to the through via structure, and an insulating layer between the second side of the substrate and the redistribution structure. The redistribution structure may include a redistribution barrier layer and a redistribution metal layer, and the redistribution barrier layer may extend on a bottom surface of the redistribution metal layer and may partially surround a side of the redistribution metal layer.

Growing community of inventors

Yongin-si, South Korea

Tae-Yeong Kim