Samsung Electronics Co., Ltd.

Tae-Yeol Heo

Gi-Jung Kim

Sang-Mun Chon

Kyoo-chul Cho

Kyoo-Chul Cho

Gi-jung Kim

Jeong-hoon An

Woo-Serk Kim

Sook-Hyun Park

Semiconductor wafers utilize asymmetric edge profiles (EP) to facilitate higher yield semiconductor device processing. These edge profiles are configured to reduce the volume of thin film residues that may form on a top surface of a semiconductor wafer at locations adjacent a peripheral edge thereof. These edges profiles are also configured to inhibit redeposition of residue particulates on the top surfaces of the wafers during semiconductor processing steps. Such steps may include surface cleaning and rinsing steps that may include passing a cleaning or rinsing solution across a wafer or batch of wafers that are held by a cartridge and submerged in the solution.

Semiconductor wafers having asymmetric edge profiles that facilitate high yield processing by inhibiting particulate contamination

An apparatus for analyzing a substrate employing a copper decoration includes a bath having at least two receiving containers for receiving electrolytes, slots formed at insides of the receiving containers for receiving substrates to be analyzed in a direction that is normal to a bottom face of the bath, lower copper plates provided in the receiving containers, the lower copper plates making contact with entire rear faces of the substrates received in the receiving containers, upper copper plates provided in the receiving containers, each of the upper copper plates corresponding to a respective one of the lower copper plates, and separated from front faces of the substrates, and a power source connected to the upper copper plates and the lower copper plates for providing voltages to the same. A plurality of substrates may be simultaneously analyzed using one apparatus thereby greatly reducing an amount of time required for the analysis.

Apparatus for analyzing a substrate employing a copper decoration

Embodiments of the present invention provide methods for measuring a wafer surface. A portion of the wafer surface is measured using a particle counter to provide first measurements corresponding to a plurality of points on the wafer surface. A selected area of the wafer surface including one of the plurality of points is measured using an atomic force microscope (AFM) to provide a microroughness measurement of the selected area. The selected area is a localized area of the portion of the wafer surface measured using the particle counter. The first measurements and the microroughness measurement are provided as a measurement of the wafer surface. The portion measured using a particle counter may, for example, be substantially the entire wafer surface.

Methods and systems for measuring microroughness of a substrate combining particle counter and atomic force microscope measurements

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Kyeongki-do, South Korea

Tae-Yeol Heo