Samsung Electronics Co., Ltd.

Tae-Wook Seo

Seung-Jae Lee

Chul-Sung Kim

Byoung-Deog Choi

Ja-Hum Ku

Jin-Ho Jeon

Soo-Geun Lee

Jong-Seung Yi

Sun-Hoo Park

Eung-joon Lee

Joo-Hyuk Chung

An insulating layer having a BPSG layer, a semiconductor device and methods for fabricating them. After preparing an oxidizing atmosphere using an oxygen gas, a first seed layer is formed with a tetraethylorthosilicate (TEOS) and the oxygen gas. Thereafter, a second seed layer, used to form an insulating layer capable of controlling an amount of a boron, is formed by means of using a triethylborate (TEB), the TEOS and the oxygen gas. Then, the insulating layer having a BPSG layer is formed using the TEB, a triethylphosphate, the TEOS and an ozone gas. About 5.25 to 5.75% by weight of the boron and about 2.75 to 4.25% by weight of the phosphorous are added to the insulating layer.

Insulating layer, semiconductor device and methods for fabricating the same

A novel fuse structure for a semiconductor integrated circuit device and the method of manufacturing the semiconductor integrated circuit device is disclosed. The fuse structure is comprised of a first interconnection metal layer formed on a semiconductor substrate; an inter-metal dielectric layer formed on the first interconnection metal layer having a via exposing the first interconnection metal layer; a via plug filling up the via; a metal layer for a fuse and a second interconnection metal layer consecutively deposited on the via plug and the inter-metal dielectric layer; and an opening area exposing the metal layer for a fuse is positioned more than twice the thickness of the second interconnection metal layer from the via. With the present invention, a contact failure which can result from a damage to via plug in a subsequent stripping step can be prevented. Also, a passivation layer formed after opening the fuse area prevents a short-circuit between adjacent fuses in a subsequent laser repairing process.

Semiconductor integrated circuit device and method of manufacturing the same

There is provided a semiconductor device fabrication method. In the method, a gate layer is formed on a semiconductor substrate and patterned to form a first resultant structure, a metal layer is formed on the first resultant structure, a capping layer is formed on the metal layer, a metal silicide is formed on the gate layer by heating the substrate at a first temperature, unreacted metal layer and first capping layer are removed to form a second resultant structure, a second capping layer is formed on the second resultant structure, and the substrate is heated at a second temperature higher than the first temperature. The second capping layer suppresses a silicidation rate in the secondary heat treatment, thereby allowing a silicide of a good morphology to be achieved.

Method of forming self-aligned silicide in semiconductor device

Growing community of inventors

Gyeonggi-do, South Korea

Tae-Wook Seo