Samsung Electronics Co., Ltd.

Tae-Sik Son

Chang-Sik Kim

Doo-Seon Lee

Kun-Up Kim

Hyung-Dong Kim

Jae-Hoon Joo

Beom-Sig Cho

Byung-heon Kwak

Na-Rae Kim

Hee-Joong Oh

Young-Min Jang

A power-down method for a system including a plurality of volatile memory devices is disclosed. The method includes providing some of the plurality of volatile memory devices or some memory regions of the volatile memory devices to operate in a self-refresh mode, thereby increasing a rebooting operation speed and reducing power consumption.

Power-down method for system having volatile memory devices

In an embodiment, a semiconductor device is tested using a probe pad that includes a probing region with which a probe needle makes contact, and a sensing region bordering an edge of the probing region. Electrical signals are applied, and measured results indicate the probe needle's location relative to a test position on the semiconductor device.

Probe pad, substrate having a semiconductor device, method of testing a semiconductor device and tester for testing a semiconductor device

In a layout structure of pads and a structure of pad used for a test or wire bonding of a semiconductor device, a size of at least one or more non-wire bonding pads is relatively small as compared with a size of at least one or more pads to be used for wire bonding of the semiconductor device. In the pad structure, a pad includes a wire bonding region that has an embossed surface for a portion of top metal layer within a determined pad size to improve the bonding process, and a probe tip contact region that does not have the embossed surface for a surface portion of the top metal layer within the determined pad size, so as to reduce wear of probe tip during testing of the device. Pad pitch can thereby be increased within a limited region, and peripheral circuits can be further formed in regions that would have been occupied in a conventional pad formation region. Higher integration of semiconductor devices and reduced wear of probe tip in probing is thereby realized.

Semiconductor device including wire bonding pads and pad layout method

Methods for driving a wordline in a semiconductor memory device are provided. Pursuant to these methods, a wordline drive signal is generated that may be used to activate a first wordline in response to a drive signal that is derived from a row address signal. A wordline reset signal for deactivating the first wordline may then be generated in response to the drive signal derived from the row address signal, a refresh wordline signal established during a refresh operation, and a mode register set wordline signal provided from a mode register. Semiconductor memory devices that implement these methods are also disclosed.

Semiconductor memory device with driving circuits for screening defective wordlines and related methods

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Gyeonggi-do, South Korea

Tae-Sik Son