Samsung Sdi Co., Inc.

Samsung Electronics Co., Ltd.

University-industry Cooperation Group of Kyung Hee University

Samsung Electro-mechanics Co., Ltd.

Samsung Mobile Display Co., Ltd.

Tae-Seong Kim

Woo-Joon Chung

Seung-Hun Chae

Jin-sung Kim

Kyoung-Ho Kang

Jin-Ho Yang

Kwang-Jin Moon

Dong-Chan Lim

Jin-Sung Kim

Seong-Joon Jeong

Dae-suk Lee

Hak-seung Lee

Hyun-Soo Kim

Ju-Il Choi

Jae-Hwa Park

Dae-hyun Sim

Ju-Bin Seo

Suk-Jae Park

Su-Jeong Park

Jong-Chang Lee

Byung-Lyul Park

Gyu-Hong Kim

Hyun-Taek Jung

Suk-chul Bang

Dong-Young Lee

Byung-Iyul Park

Woo-Joon Jeong

Cheol-ha Lee

Myoung-Kyu Seo

Jeong-Gi Jin

Sungyoung Lee

Seung-Min Kim

Young-Koo Lee

Sung-hee Kang

Suk-Chul Bang

Jun-Oh Hwang

Jae-Ho Shin

Yun-Je Ji

Phan Tran Ho Truc

Dae-Suk Lee

Seung-Hun Cheongmyung Maeul Chae

Kyoung-Ho Sinnamusil Sinsung Kang

Woo-Joon Samsung Sdi Dormitory Chung

A semiconductor package includes a first semiconductor chip and a second semiconductor chip stacked on the first semiconductor chip. The first semiconductor chip includes a substrate having a first via hole, an insulation interlayer formed on the substrate and having a first bonding pad in an outer surface thereof and a second via hole connected to the first via hole and exposing the first bonding pad, and a plug structure formed within the first and second via holes to be connected to the first bonding pad. The second semiconductor chip includes a second bonding pad bonded to the plug structure which is exposed from a surface of the substrate of the first semiconductor chip.

Semiconductor device, semiconductor package and method of manufacturing the same

A semiconductor device is provided. The semiconductor device includes a first insulating interlayer disposed on a first surface of a substrate; a pad pattern disposed on a lower surface of the first insulating interlayer, the pad pattern including a first copper pattern; and a through silicon via passing through the substrate and the first insulating interlayer, and contacting the first copper pattern of the pad pattern. The through silicon via includes a first portion passing through the substrate and the first insulating interlayer, and a second portion under the first portion and extending to a portion of the first copper pattern in the pad pattern. A boundary of the through silicon via has a bent portion between the first portion and the second portion.

Semiconductor device having a through silicon via and methods of manufacturing the same

A printed circuit board assembly includes a first printed circuit board, a second printed circuit board, and a space holding member. The second printed circuit board includes a first rigid substrate region, spaced apart from and opposed to the first printed circuit board, and a flexible substrate region, extended from one side of the first rigid substrate region to be connected to the first printed circuit board. The space holding member includes a first member, disposed between the first printed circuit board and the second printed circuit board to maintain a space therebetween, and a second member configured to fix the first printed circuit board or the second printed circuit board on the first member.

Printed circuit board assembly

Semiconductor chips and methods of manufacturing the same are provided. The semiconductor chip includes a substrate, an interlayer insulation layer including a bottom interlayer insulation layer on an upper surface of the substrate and a top interlayer insulation layer on the bottom interlayer insulation layer, an etch stop layer between the bottom interlayer insulation layer and the top interlayer insulation layer, a landing pad on the interlayer insulation layer, and a through via connected to the landing pad through the substrate, the interlayer insulation layer, and the etch stop layer. The etch stop layer is isolated from direct contact with the landing pad.

Semiconductor chips and methods of manufacturing the same

A one time programmable (OTP) memory includes an OTP cell array including a plurality of OTP cells provided at locations where a plurality of word lines and a plurality of bit lines cross each other, and a write circuit configured to sequentially program the OTP cells by selecting the bit lines one at a time and program a selected OTP cell connected to the selected bit line, wherein the write circuit is further configured to detect a voltage level of the selected bit line and select another bit line when the detected voltage level indicates that the selected OTP cell is in a programmed state.

One time programmable memory and a data writing method thereof

A fuse memory comprising a discharge circuit is provided. The fuse memory includes a fuse cell array comprising fuse cells connected to read word lines, programs word lines, and bit lines arranged in rows and columns; and at least one discharge circuit arranged in each of the rows. The discharge circuit discharges a voltage level of a program word line of the fuse cells selected in a read mode to a ground voltage.

Fuse memory having discharge circuit

A semiconductor device and a method for fabricating the same are provided. The semiconductor device comprising a substrate including a first surface and a second surface that face each other, a planarization layer formed on the first surface of the substrate, a passivation layer formed on the planarization layer, and a through via contact penetrating the substrate, the planarization layer, and the passivation layer, and being exposed from the passivation layer.

Semiconductor device and method for fabricating the same

An apparatus and method for human activity and facial expression modeling and recognition are based on feature extraction techniques from time sequential images. The human activity modeling includes determining principal components of depth and/or binary shape images of human activities extracted from video clips. Independent Component Analysis (ICA) representations are determined based on the principal components. Features are determined through Linear Discriminant Analysis (LDA) based on the ICA representations. A codebook is determined using vector quantization, Observation symbol sequences in the video clips am determined. And human activities are learned using the Hidden Markov Model (HMM) based on status transition and an observation matrix.

Apparatus and method for video sensor-based human activity and facial expression modeling and recognition

Provided are a semiconductor device and a semiconductor package. The semiconductor device includes semiconductor device includes a semiconductor substrate having a first side and a second side. A front-side structure including an internal circuit is disposed on the first side of the semiconductor substrate. A passivation layer is disposed on the second side of the semiconductor substrate. A through-via structure passes through the semiconductor substrate and the passivation layer. A back-side conductive pattern is disposed on the second side of the semiconductor substrate. The back-side conductive pattern is electrically connected to the through-via structure. An alignment recessed area is disposed in the passivation layer. An insulating alignment pattern is disposed in the alignment recessed area.

Semiconductor device and semiconductor package

Integrated circuit (IC) devices are provided including: a first multi-layer wiring structure including a plurality of first wiring layers in a first region of a substrate at different levels and spaced apart from one another, and a plurality of first contact plugs between the plurality of first wiring layers and connected to the plurality of first wiring layers; a through-silicon via (TSV) landing pad including a first pad layer in a second region of the substrate at a same level as that of at least one first wiring layer from among the plurality of first wiring layers, and a second pad layer at a same level as that of at least one first contact plug from among the plurality of first contact plugs and contacts the first pad layer; a second multi-layer wiring structure on the TSV landing pad; and a TSV structure that passes through the substrate and is connected to the second multi-layer wiring structure through the TSV landing pad.

Integrated circuit devices including a through-silicon via structure and methods of fabricating the same

An apparatus and method for human activity and facial expression modeling and recognition are based on feature extraction techniques from time sequential images. The human activity modeling includes determining principal components of depth and/or binary shape images of human activities extracted from video clips. Independent Component Analysis (ICA) representations are determined based on the principal components. Features are determined through Linear Discriminant Analysis (LDA) based on the ICA representations. A codebook is determined using vector quantization. Observation symbol sequences in the video clips are determined. And human activities are learned using the Hidden Markov Model (HMM) based on status transition and an observation matrix.

A plasma display panel (PDP) and a method of manufacturing the same, the PDP including scan electrodes extending parallel to one another, sustain electrodes extending parallel to the scan electrodes, and address electrodes extending across the sustain electrodes and the scan electrodes. The address electrodes are divided into a first address electrode group extending from a first side of the panel, and a second address electrode group extending from an opposing second side of the panel, such that the first and second groups are disposed on different sides of the PDP.

Plasma display panel and method of manufacturing the same

Disclosed is a method for enhancing blood vessels in angiography images. The method incorporates the use of linear directional features present in an image, extracted by a Directional Filter Bank, to obtain more precise Hessian analysis in noisy environment and thus can correctly reveal small and thin vessels. Also, the directional image decomposition helps to avoid junction suppression, which in turn, yields continuous vessel tree.

Method for enhancing blood vessels in angiography images

Growing community of inventors

Suwon-si, South Korea

Tae-Seong Kim