Samsung Electronics Co., Ltd.

Korea University Research and Business Foundation

Tae-Seok Oh

June-Taeg Lee

Young-Hoon Park

Byung-jun Park

Seung-hun Shin

Chang-rok Moon

Jong-Won Choi

Su-Young Oh

Seong-Ho Oh

Jung-Ho Park

Won-je Park

Jong-wook Hong

Eun-soo Kim

Jeong-Hoon Bae

Hyoun-Min Beak

Young-Gu Jin

Ki-Hong Kim

Tae-Chan Kim

Inkyu Lee

Tae-Yon Lee

Jong-Jin Lee

Kwang-Hyun Lee

Dong Ki Min

Yoon Dong Park

Jae-Ho Song

Je Il Ryu

Bum-Suk Kim

Tae-Yeong Kim

Ju Hwan Jung

Sang-Chul Sul

Jong-Ho Oh

Sae-Young Kim

Duk-Min Yi

Young-Mook Oh

Doo-won Kwon

Won-Je Park

Yun-Ho Jang

Keon-Yong Cheon

Bong-Jin Kim

Min-Ki Ahn

Duk-seo Park

Seok Yong Hong

Ha-Kyu Choi

Sung-kwan Kim

Hyoun-min Baek

Jeong-ki Kim

Seok-Ju Jang

Jung-Hyeok Oh

Yo-Han Sun

Sung-Jae Joo

Keun-Chan Yuk

Wook-hwan Kim

A semiconductor device includes a lower device and an upper device disposed on the lower device. The lower device includes a lower substrate, a lower plug pad disposed on the lower substrate, and a lower interlayer dielectric layer on the lower plug pad. The upper device includes an upper substrate, an etch-delay structure in a lower portion of the upper substrate, an upper plug pad disposed on a bottom surface of the upper substrate, an upper interlayer dielectric layer on the upper plug pad, and a via plug configured to penetrate the upper substrate and contact the upper plug pad and the lower plug pad. The via plug includes a first portion in contact with the upper plug pad and the first etch-delay structure, and a second portion in contact with the lower plug pad.

Via structures including etch-delay structures and semiconductor devices having via plugs

The present invention relates to a 5th-generation (5G) or pre-5G communication system which is provided for supporting a higher data transfer rate after a 4th-generation (4G) communication system such as a long term evolution (LTE). The present invention provides a method for selecting, by an access point (AP), a beam in a communication system supporting a beamforming scheme, the method comprising: a step of transmitting information which indicates whether or not a duplicated beacon transmission interval (BTI) is operated; and a step of performing a transmit sector sweep (TXSS) process at least twice during the duplicated BTI.

Apparatus and method for selecting beam pattern in communication system supporting beamforming scheme

A stack type image sensor may include: a first chip including a via isolation trench penetrating a first substrate, a via isolation layer including an insulation material in the via isolation trench, a first conductive layer on the first substrate, and a first insulation layer; a second chip including a second conductive layer on a second substrate, and a second insulation layer contacting the first insulation layer; a first via trench penetrating the first substrate to expose the second conductive layer with respect to the trench; and a first through via formed in the first via trench, and including a third conductive layer insulated from the first substrate by the via isolation layer, the third conductive layer electrically connecting the first conductive layer to the second conductive layer. The third conductive layer may be formed in the via isolation trench.

Stack type image sensor

A binary complementary metal-oxide-semiconductor (CMOS) image sensor includes a pixel array and a readout circuit. The pixel array includes at least one pixel having a plurality of sub-pixels. The readout circuit is configured to quantize a pixel signal output from the pixel using a reference signal. The pixel signal corresponds to sub-pixel signals output from sub-pixels, from among the plurality of sub-pixels, activated in response to incident light.

Binary CMOS image sensors, methods of operating same, and image processing systems including same

An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer.

Electronic devices including multiple semiconductor layers

An image sensor includes a light receiving device, a field effect transistor, a stress layer pattern, and a surface passivation material. The light receiving device is formed in a first region of a substrate. The field effect transistor is formed in a second region of the substrate. The stress layer pattern is formed over the field effect transistor for creating stress therein to improve transistor performance. The surface passivation material is formed on the first region of the substrate for passivating dangling bonds at the surface of the light receiving device.

Image sensor having reduced dark current

An image sensor comprises a substrate including a photodiode, and an insulation pattern structure making contact with the photodiode on the substrate. An anti-reflection pattern is formed on the insulation pattern structure and the substrate. The anti-reflection pattern includes a first opening through which the insulation pattern structure is exposed corresponding to the photodiode. A first insulation interlayer structure is formed on the anti-reflection pattern, and the first insulation interlayer structure includes at least one insulation layer and a second opening connected to the first opening. A metal wiring structure is formed in the insulation layer, and a transparent insulation pattern is formed in the first and second openings. A color filter is formed on the transparent insulation pattern, and a micro lens is formed on the color filter.

Image sensor and method of manufacturing the same

A semiconductor integrated circuit device includes a semiconductor substrate including a main chip region and a pad region, a multi-layer pad structure on the pad region of the semiconductor substrate, a redistribution pad through the semiconductor substrate and in contact with a bottom surface of the multi-layer pad structure, the redistribution pad being electrically connected to the multi-layer pad structure, a trench belt through the semiconductor substrate and surrounding the redistribution pad, the trench belt electrically isolating the redistribution pad and a portion of the semiconductor substrate adjacent to the redistribution pad, and a connection terminal on the redistribution pad, the connection terminal electrically connecting the redistribution pad to an external source.

Semiconductor integrated circuit device and method of fabricating the same

Disclosed is a image sensor (e.g., a CMOS image sensor) including pixels each having a transfer transistor and a drive transistor, in which the gate of at least one of the transistors has a boosting gate disposed over it comprised of a conductive film pattern with interposing an insulation film. Thus, a voltage applied to the boosting gate is capacitively coupled to at least one of the transfer gate of the transfer transistor and a drive gate of the drive transistor. The transfer gate is supplied with the sum of the transfer voltage and the boosting gate-coupling voltage as a result and there is no need for providing a high voltage generator for the image sensor. The dynamic range of operation may be enhanced if such a coupling voltage is applied to the drive gate of the drive transistor.

Image sensor with self-boosting transfer transistor gate and methods of operating and fabricating the same

Example embodiments may provide methods of manufacturing an image sensor. Example methods of manufacturing an image sensor may include forming a photoelectric converter in a semiconductor substrate, forming an interlayer insulating film covering a surface of the semiconductor substrate, forming metal wires and an inter-metal insulating film filling between the metal wires on the interlayer insulating film, forming openings above the photoelectric converter by removing a part of the inter-metal insulating film and the interlayer insulating film, curing the surface above the photoelectric converter by irradiating light into the openings, and/or forming a light transmitter filling the openings.

Methods of manufacturing image sensors

Method of fabricating image sensor having reduced dark current

A method of fabricating an image sensor according to example embodiments may include forming a photodiode in a photoelectric conversion region of a substrate and forming an etch stop layer on the substrate. The etch stop layer may be patterned to form an inner lens on the photoelectric conversion region and an etch stop layer pattern on a transistor region of the substrate. A metal interconnection structure may be formed on the inner lens and the etch stop layer pattern. Accordingly, the number of additional processes for fabricating an image sensor may be reduced.

Method of fabricating image sensor having inner lens

A CMOS image sensor may be provided. The CMOS image sensor may include at least one floating diffusion column line, a plurality of pixels, and/or a charge/voltage conversion circuit. The plurality of pixels may be connected to the floating diffusion column line in parallel. The charge/voltage conversion circuit may be connected to one end of the floating diffusion column line, and may detect a potential variation of the floating diffusion column line using a coupling capacitor.

CMOS image sensor and operating method thereof

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Seoul, South Korea

Tae-Seok Oh