Samsung Electronics Co., Ltd.

Koh Young Technology Inc.

Korea Advanced Institute of Science and Technology

Hyosung Tns Inc.

Tae Min Choi

Chan Ho Lee

Duk Young Lee

Kyu Won Choi

Hyeong Cheol Kim

Ju Chang Lee

Seung Jae Lee

Chan Woo Park

Chang Ho Park

Jae Hoon Kwak

Woo Jin Jung

Jong Hwan Kim

Suk Youn

Hyun Sung Chung

Suk Joo Kim

Juyoun Park

Ye Won Hwang

Jeong Kyun Kim

Joanna Hong

Jung Hak Song

Jin Man Park

Yong Ho Yoo

A memory device and operating method of the memory device are provided. The memory device comprises a memory cell storing data based on a first voltage, a row decoder selecting a wordline of the memory cell based on the first voltage, and a wordline predecoder configured to generate a 'predec' signal, which is for generating a wordline voltage to be provided to the row decoder. The wordline predecoder is driven by the first voltage and a second voltage, which is different from the first voltage, receives a row address signal, associated with selecting the wordline, and an internal clock signal associated with adjusting operating timings of elements included in the memory device. The wordline predecoder performs a NAND operation on the row address signal and the internal clock signal, and provides the “predec” signal generated based on a result of the NAND operation to the row decoder.

Memory device including predecoder and operating method thereof

A memory device is provided. The memory device comprises an internal clock generator configured to receive an external clock signal from a host and generate an internal clock signal in accordance with a chip enable signal, an internal enable signal generator configured to operate based on the internal clock signal and receive an external enable signal from the host and generate an internal enable signal, and a monitoring signal generator configured to output a monitoring signal that is generated based on at least one of the internal clock signal or the internal enable signal to the host.

Memory device with real-time monitoring

A pseudo dual port memory device in which an operating speed is improved and stability is increased is provided. The pseudo dual port memory device may include a memory cell, a pair of bit lines connected to the memory cell, a write driver, a sense amp, and a column multiplexer which is connected to the bit lines, receives a write multiplexer control signal and a read multiplexer control signal, connects the bit lines to the write driver in response to the write multiplexer control signal, and connects the bit lines to the sense amp in response to the read multiplexer control signal. A precharge control signal generation circuit which is connected to the column multiplexer may generate a precharge control signal on the basis of the read and write multiplexer control signals, and a bit line precharge circuit may precharge the bit lines based on the precharge control signal.

Pseudo dual port memory devices

A substrate inspection apparatus generates, when anomalies of a plurality of second solder pastes among a plurality of first solder pastes printed on a first substrate is detected, at least one image indicating a plurality of second solder pastes with anomalies detected by using an image about a first substrate, applies the at least one image to a machine-learning-based model, acquires a plurality of first values indicating relevance of respective first fault types to the at least one image and a plurality of first images indicating regions associated with one of a plurality of first fault types, determines a plurality of second fault types, which are associated with the plurality of second solder pastes by using the plurality of first values and the plurality of first images, and determines at least one third solder paste, which is associated with the respective second fault types.

Substrate inspection apparatus and method of determining fault type of screen printer

An apparatus, a recording medium, and a method for generating a control parameter of a screen printer are disclosed. The apparatus includes a memory that stores a simulation model configured to derive predictive inspection information on a printed state of solder paste based on a plurality of control parameters of the screen printer; a communication circuit configured to receive first inspection information on a plurality of solder pastes printed by the screen printer based on a first control parameter, and a processor electrically connected to the memory and the communication circuit. The processor obtains first predictive inspection information by applying the first control parameter to the simulation model, generates a plurality of candidate control parameters based on the first predictive inspection information, determines a plurality of second control parameters among the candidate control parameters, and transmits the plurality of second control parameters to the screen printer via the communication circuit.

Apparatus and method of generating control parameter of screen printer

The present disclosure relates to a transit transfer path unit structure connecting a supply/collection cassette and a banknote transfer path of an upper main body in an ATM which includes the upper main body and a lower main body and has a structure in which the supply/collection cassette is mounted on one side of the lower main body. The transit transfer path unit is disposed on one side of the upper main body of the ATM, and detachably provided between the supply/collection cassette and the banknote transfer path provided in the upper main body for separation from a banknote transfer route. Thus, the upper main body may be easily pulled to the front or rear of the ATM without any interference with the transit transfer path unit to perform the maintenance work, enhancing the convenience of the maintenance of the ATM.

Transfer path unit structure for supply/collection cassette of ATM

Growing community of inventors

Seoul, South Korea

Tae Min Choi