Seoul National University

Samsung Electronics Co., Ltd.

Skhynix Inc.

Sungkyunkwan University

Tae Jun Ham

Jae Wook Lee

Seung Wook Lee

Jaeyeon Won

Jaewook Lee

Deog-Kyoon Jeong

Jinkyu Jeong

Jun Heo

Gyusun Lee

Jaeyoung Jang

Young Hwan Oh

Younghwan Oh

Yejin Lee

Yunho Jin

Wenjing Jin

Minsoo Lim

Sungjun Jung

Seonghak Kim

Seng Hak Kim

Gyu Sun Lee

Jin Kyu Jeong

A processor-implemented method with scheduling includes: receiving one or more execution requests for a plurality of models executed independently of each other in an accelerator; predicting, for each of the plurality of models, quality of service (QoS) information corresponding to the model; and scheduling the plurality of models in units of layers of the plurality of models based on, for each of the plurality of models, either one or both of the QoS information and an idle time occurring in response to a candidate layer to be scheduled in the model being executed in the accelerator.

Apparatus and method with scheduling

A processor, a method of operating the processor, and an electronic device including the processor are disclosed. The method includes arranging, in respective input registers, weights and activations having a smaller number of bits than a minimum operation unit of an operator included in the processor, performing a multiplication between values stored in the input registers, storing a result of the multiplication in an output register, and outputting, from the output register, a value in a preset bit range as a result of a dot product between a first vector including the weights and a second vector including the activations.

Processor, method of operating the processor, and electronic device including the same

A scheduler, a method of operating the scheduler, and an accelerator apparatus including the scheduler are disclosed. A method of operating a scheduler to perform scheduling on models to be executed in an accelerator, the method includes receiving at least one execution request for a first model and a second model that are executed independently from each other in the accelerator, and performing layer-unit scheduling on the first model and the second model based on workload characteristics of the first model and the second model.

Scheduler, method of operating the same, and accelerator apparatus including the same

An accelerator includes a key matrix register configured to store a key matrix, a query vector register configured to store a query vector; and a preprocessor configured to calculate similarities between the query vector and the key matrix.

Method for candidate selection and accelerator for performing candidate selection

A hardware accelerator includes a block processing circuit configured to read a block from a list stored in an inverted index structure; and a search core configured to extract a document number out of a read block read by the block processing circuit and to calculate a score corresponding to the document number.

Hardware accelerator performing search using inverted index structure and search system including the hardware accelerator

Disclosed is a method for processing a page fault. The method includes performing demand paging depending on an application operation in a system including a processor and an operating system, and loading, at the processor, data on a memory in response to the demand paging.

Method for processing page fault by processor

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Seoul, South Korea

Tae Jun Ham