Skhynix Inc.

Tae Hun Park

Dong Hun Kwak

Hyung Jin Choi

Nam Kyeong Kim

Yeong Jo Mun

Hyun Seob Shin

A method of operating a controller includes transmitting a program command to a memory device, receiving a message indicating that a program operation corresponding to the program command is failed from the memory device, and transmitting an erase command for performing an erase operation on a page corresponding to the program command to the memory device in response to the message.

Method of operating a controller and a memory device related to recovering data

The present technology relates to an electronic device. A memory device according to an embodiment includes a memory cell string including first memory cells included in a first channel area, second memory cells included in a second channel area, and dummy memory cells connected between the first memory cells and the second memory cells, a peripheral circuit configured to perform a program operation of storing data in the first and second memory cells, and a program operation controller configured to control the peripheral circuit to apply a first pass voltage to a dummy word line connected to the dummy memory cells during the program operation, apply a second pass voltage less than the first pass voltage to the dummy word line, and then apply a program voltage to a selected word line among a plurality of word lines connected to the first and second memory cells.

Memory device and method of operating the memory device

A memory device includes a controller that performs a program verification after a first program pulse is applied to the at least one non-volatile memory cell. The first program pulse is applied during a data program operation and the data program operation includes applying program pulses to program multi-bit data to the at least one non-volatile memory cell. The controller also determines a program mode for the at least one non-volatile memory cell based on a result of the program verification, and changes at least one of a level of a first control voltage based on the program mode. The first control voltage is applied to a drain select line coupled to the at least one non-volatile memory cell.

Apparatus and method for programming data in a non-volatile memory device

A memory device includes a memory structure including at least one non-volatile memory cell capable of storing multi-bit data, and a control device configured to perform a program verification after a first program pulse is applied to the at least one non-volatile memory cell, determine a program mode for the at least one non-volatile memory cell based on a result of the program verification, and change a level of a pass voltage, applied to another non-volatile memory cell coupled to the at least one non-volatile memory cell, from a first level to a second level which is higher than the first level, or a setup time for changing a potential of a bit line coupled to the at least one non-volatile memory cell, according to the program mode.

A nonvolatile memory device comprising: a cell string comprising a plurality of memory cells, a bit line coupled to the cell string, and a page buffer suitable for precharging the bit line, a first sensing node and a second sensing node to a preset level in a first period, and double-sensing the bit line through the first and second sensing nodes in a second period, wherein the page buffer comprises: a first coupling unit suitable for coupling the bit line and the first sensing node, a second coupling unit suitable for coupling the first and second sensing nodes, and controlling the first and second sensing nodes to have a voltage level interval according to a preset ratio in the second period, a first and second latch units suitable for latching a logic levels corresponding to a voltage levels of the first and second sensing nodes, respectively.

Nonvolatile memory device for performing double sensing operation

Provided is a memory device. The memory device may include a voltage code controller configured to generate a voltage code that generates a program voltage and pass voltages based on a number of times a program loop is performed, and a voltage generator configured to generate the program voltage and the pass voltages in response to the voltage code, transmit the program voltage to a selected word line, and transmit the pass voltages to unselected word lines, wherein the voltage generator is configured to sequentially increase the pass voltage that is applied to the unselected word lines in order of proximity to the selected word line as the number of times a program loop is performed increases.

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Icheon-si Gyeonggi-do, South Korea

Tae Hun Park