Fairchild Korea Semiconductor Ltd.

Other

Tae-hun Kwon

Cheol-joong Kim

Chang-Ki Jeon

Young-sub Jeong

Suk-kyun Lee

Sung-lyong Kim

Sung-Iyong Kim

Choel-joong Kim

A power semiconductor device has a first region in which a transistor is formed, a third region in which a control element is formed, and a second region for separating the first region and the third region. The power semiconductor device includes a substrate of a first conductive type and a semiconductor region of a second conductive type arranged on the substrate, and a highly-doped buried layer of the second conductive type and a highly-doped bottom layer of the first conductive type are arranged between the substrate and the semiconductor region, and the first highly-doped bottom layer of the first conductive type is arranged on a top side and a bottom side of the highly-doped buried layer in the first region and extends by a predetermined distance to the second region, and a first isolation region is arranged on the highly-doped bottom layer extending from the first region in the second region, and a highly-doped region of the second conductive type is arranged on the highly-doped buried layer, and a second isolation region is arranged on a second highly-doped bottom layer of the first conductive type . By such structure, parasitic bipolar junction transistors in the first isolation region and the second isolation region can be electrically separated from the third region.

Method of fabricating power semiconductor device for suppressing substrate recirculation current

There is provided a high voltage gate driver integrated circuit. The high voltage gate driver integrated circuit includes: a high voltage region; a junction termination region surrounding the high voltage region; a low voltage region surrounding the junction termination region; a level shift transistor disposed between the high voltage region and the low voltage region, at least some portions of the level shift transistor being overlapped with the junction termination region; and/or a high voltage junction capacitor disposed between the high voltage region and the low voltage region, at least some portions of the high voltage junction capacitor being overlapped with the junction termination region.

High voltage gate driver integrated circuit including high voltage junction capacitor and high voltage LDMOS transistor

A power semiconductor device has a first region in which a transistor is formed, a third region in which a control element is formed, and a second region for separating the first region and the third region. The power semiconductor device includes a substrate of a first conductive type and a semiconductor region of a second conductive type arranged on the substrate, and a highly-doped buried layer of the second conductive type and a highly-doped bottom layer of the first conductive type are arranged between the substrate and the semiconductor region, and the first highly-doped bottom layer of the first conductive type is arranged on a top side and a bottom side of the highly-doped buried layer in the first region and extends by a predetermined distance to the second region, and a first isolation region is arranged on the highly-doped bottom layer extending from the first region in the second region, and a highly-doped region of the second conductive type is arranged on the highly-doped buried layer, and a second isolation region is arranged on a second highly-doped bottom layer of the first conductive type. By such structure, parasitic bipolar junction transistors in the first isolation region and the second isolation region can be electrically separated from the third region.

Power semiconductor device for suppressing substrate recirculation current and method of fabricating power semiconductor device

A power device and a method for manufacturing the same are provided. The power device comprises a first conductive semiconductor substrate; a second conductive buried layer formed to a certain depth within the semiconductor substrate; a second conductive epitaxial layer formed on the conductive buried layer; a first conductive well formed within the conductive epitaxial layer; a second conductive well formed within the second conductive epitaxial layer, on both sides of the first conductive well; a second conductive drift region formed in predetermined portions on the first and the second conductive well; and a lateral double diffused MOS transistor formed in the second conductive drift region. The breakdown voltage of the power device is controlled according to a distance between the first conductive well and the second conductive buried layer.

Reduced surface field technique for semiconductor devices

Power devices in which a low on-resistance can be obtained while maintaining a high breakdown voltage and a method for manufacturing the power devices are described. The power device includes a semiconductor substrate having a first conductivity type, a burying layer having a high concentration of a second conductivity type arranged deep in the semiconductor substrate, a well having a low concentration of a second conductivity type formed on the burying layer of the semiconductor substrate, a body region having a first conductivity type formed in a predetermined portion in the well having a low concentration of a second conductivity type, first and second channel stop regions having a low concentration of a second conductivity type, the first and second channel stop regions are formed in a predetermined portion of the body region and on both edges of the body region having a first conductivity type, a gate electrode including a gate insulating layer, formed on a space between the first and second channel stop regions, source and drain regions having a high concentration of a second conductivity type formed in the first and second channel stop regions on both sides of the gate electrode, and a body contact region formed in the source region. Only the body region having a first conductivity type exists between the first and second channel stop regions, and a channel is formed between the first and second channel stop regions.

Growing community of inventors

Seoul, South Korea

Tae-hun Kwon