Samsung Electronics Co., Ltd.

Db Hitek Co., Ltd.

Korea Electronics Technology Institute

Tae-Ho Hwang

Jae-Hong Kim

Hye-Jung Cho

Myung-Sun Kim

Jae-Hun Lee

Ayush Jain

Mi-young Kim

Min-su Hwangbo

Min-sung Jang

Dong-Sun Kim

SeungYerl Lee

Hang-ho Lee

Byung-Ho Choi

A method performed by a managing server includes: receiving, from an electronic device, operation data of the electronic device; identifying, by using artificial intelligence (AI), a device usage pattern of the electronic device; identifying, by using the AI, information related to a failure or an abnormal operation of the electronic device and a solution to the failure or the abnormal operation based on the device usage pattern and the operation data received from the electronic device; and transmitting, to a user terminal, the information related to the failure or the abnormal operation of the electronic device and the solution to the failure or the abnormal operation.

Method and apparatus for managing operation data of appliance for failure prediction

A method performed by an appliance includes receiving, from a managing server, information about a data pattern detection routine to detect abnormal data among operation data of the appliance, determining whether the operation data of the appliance matches a normal data pattern defined by the data pattern detection routine, determining the operation data as the abnormal data when the operation data does not match the normal data pattern, and transmitting the abnormal data to the managing server.

A transistor circuit having a dummy capacitor or a dummy transistor between an input terminal and a transistor is disclosed. The circuit improves secondary nonlinear characteristics of the transistor attributable to one or more parasitic components and a clock signal. The transistor circuit includes an input terminal configured to receive an input signal, a transistor having a gate configured to receive a clock signal, and a source connected to the input terminal, a connection line between the input terminal and the transistor and having a parasitic resistor therein, a parasitic capacitor between the input terminal and the transistor, and a dummy transistor having a first terminal that is connected to the connection line between the input terminal and the transistor.

Transistor circuit and electronic circuit having same

The present invention relates to an area-efficient apparatus and method for sensing a signal using overlap sampling time. In a preferred embodiment of the present invention, the sensing apparatus sensing a signal which detects degradation of a light-emitting device and transferring the signal to a compensating circuit comprises: M switching portions connected to sensing lines included in each group of M groups into which N sensing lines are divided, where N&#x3e;M and N and M are natural numbers. The switching portion is characterized by alternatively connecting any one of N/M sensing lines to a sample-and-hold portion.

Area-efficient apparatus and method for sensing signal using overlap sampling time

An electronic apparatus which is capable of being worn on a user's body is provided. The electronic apparatus includes first and second wearing units configured to connect to each other, the first wearing device including a first measurer configured to measure the user's body, and a first communicator configured to communicate with the second wearing device, and the second wearing device including a second measurer configured to measure a user's body, and a second communicator configured to communicate with the first wearing device, and a at least one main processor configured to process a first measurement signal generated by using the first measurer while the first and second wearing devices are connected to each other, and to process a second measurement signal measured and generated by the second measurer while the first and second wearing devices are either connected to each other or disconnected from each other.

Electronic apparatus and the control method thereof

A decoding device is suitable for a context-based adaptive binary arithmetic coding (CABAC) technique and allows a real-time decoding of high-definition video. The CABAC decoding device allows a simultaneous performing since determination according to multiple conditions is based on logic circuits when the device is formed in hardware. Additionally, when one macro block starts to be decoded, the device reads and stores information about neighboring macro blocks at a time from a memory. Therefore, the device does not need to access the memory at every operation and this improves the overall decoding speed.

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Seoul, South Korea

Tae-Ho Hwang