Skhynix Inc.

Hynix Semiconductor Inc.

Tae-Hang Ahn

Oh-Hyun Kim

Seung-Beom Baek

Hong-Seon Yang

Hae-Jung Park

Sung-Hwan Ahn

Young-Ho Lee

Yong-Soo Kim

Seung-Ho Pyi

Seung-Joon Jeon

Se-Aug Jang

Seung-Ryong Lee

A method for fabricating a semiconductor device includes: preparing a substrate; forming an isolation layer defining an active region in the substrate; forming a first insulation structure over the substrate, the first insulation structure defining a line-type opening that exposes the isolation layer and the active region; forming a plug pad through a Selective Epitaxial Growth (SEG) process over the exposed active regions; forming a second insulation structure inside the line-type opening, the second insulation structure defining a contact hole landing on the plug pad; and filling the contact hole with a contact plug.

Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device includes: forming a semiconductor structure including a pattern; forming an epitaxial layer having a first dopant concentration in the pattern; forming in-situ an interface layer having a second dopant concentration higher than the first dopant concentration, over the epitaxial layer; forming a metal silicide layer over the interface layer; and forming a metal plug over the metal silicide layer.

A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate structure formed over the channel region; a first SiP layer covering bottom corners of the gate structure and the recess; and a second SiP layer formed over the first SiP layer and in the recess, wherein the second SiP layer has a phosphorus concentration higher than that of the first SiP layer.

A semiconductor device includes a supplementary layer and a silicon layer stacked over a substrate, a trench penetrating the supplementary layer and the silicon layer and formed over the substrate, a gate insulation layer formed along a surface of the trench, and a buried gate formed over the gate insulation layer and filling a portion of the trench.

Semiconductor device with buried gates and method for fabricating the same

A semiconductor device includes: a gate pattern over a substrate; recess patterns provided in the substrate at both sides of the gate pattern, each having a side surface extending below the gate pattern; and a source and a drain filling the recess patterns, and forming a strained channel under the gate pattern.

Semiconductor device with strained channel and method of fabricating the same

A semiconductor device includes a substrate, a gate formed over the substrate, a gate spacer provided against first and second sidewalls of the gate, and a source/drain region formed in the substrate proximate to the gate spacer. The source/drain region includes first and second epitaxial layers including Ge, wherein the second epitaxial layer which is formed over an interfacial layer between the first epitaxial layer and the substrate has a higher germanium concentration than that of the first epitaxial layer.

A method for fabricating a semiconductor device includes forming a device isolation structure in a substrate to define active regions, forming a hard mask pattern to open a region defining an active region pattern and to cover the device isolation structure, forming the active region pattern by selectively recessing the device isolation structure formed in the opened region using the hard mask pattern as an etch barrier, removing the hard mask pattern, forming a gate insulation layer over the substrate to cover at least the active region pattern, and forming a gate electrode over the gate insulation layer to cover at least the active region pattern.

Method for fabricating a semiconductor device with a FinFET

A method for fabricating a transistor, the method includes forming a gate over a substrate to form a first resultant structure, forming a gate spacer at first and second sidewalls of the gate, etching portions of the substrate proximate to the gate spacer to form a recess in a source/drain region of the substrate, forming a first epitaxial layer including germanium to fill the recess, and performing a high temperature oxidation process to form a second epitaxial layer including germanium over an interfacial layer between the substrate and the first epitaxial layer, the second epitaxial layer having a germanium concentration that is higher than a germanium concentration of the first epitaxial SiGe layer, thereby forming a second resultant structure.

A semiconductor device with a low contact resistance and a method for fabricating it are described. The semiconductor device includes a substrate structure with a contact hole and a contact plug formed on the contact hole. The contact plug is provided with an epitaxial silicon layer and a metal layer formed on the epitaxial silicon layer. The method for fabricating such semiconductor device includes steps of exposing a portion of a substrate structure to form a contact hole, then forming an epitaxial silicon layer and a metal layer.

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Seoul, South Korea

Tae-Hang Ahn