Sungkyunkwan University

Tae Gyu Kim

Chung Yuen Won

Hoon Gi Lee

Chang Gyun An

Mi Na Kim

Bong Yeon Choi

Jun Sin Yi

Kwang Su Na

Kyoung Min Kang

The present invention relates to a control method which can perform, although a line-to-ground fault occurs in phase 1, coordinate transformation to separate the line-to-ground fault of phase 1 without unnecessary power outage by utilizing remaining normal phases, and apply transformed space vector pulse width modulation (SVPWM) to the converted coordinates, and the present invention has been made in view of the above problems, and it is an object of the present invention to provide a method of controlling space vector pulse width modulation (SVPWM), which applies zero voltage to ground-faulted phase 1 and makes an inverter operate normally with only the remaining sound phases in order to prevent unnecessary loss generated as even other sound phases are blocked when a single line-to-ground fault occurs. According to the device, method, and computer program of the present invention for controlling space vector pulse width modulation using a 3-phase 4-leg inverter under a single line-to-ground fault in an islanded microgrid, since available voltage switching vectors are limited as phase 1, in which a line-to-ground fault has occurred, and phase n are restricted to have the same switching state, a novel coordinate transformation may be performed to compensate for the distortions generated therefrom, and since a novel space vector pulse width modulation (SVPWM) method that can be appropriately applied to the transformed coordinates can be provided, the problem of inducing loss of power and reducing the life of devices by unnecessarily cutting off even the sound phases can be solved even when a line-to-ground fault occurs.

Device for controlling space vector pulse width modulation using 3-phase 4-leg inverter under single line-to-ground faults in islanded microgrids and method thereof

A method for controlling a fault of a three phase four wire interlinking converter system according to one embodiment of the present disclosure comprises obtaining a first d-q-o coordinate plane based on an internal phase angle of output voltage produced from each phase of an inverter; converting the first d-q-o coordinate plane to a second d-q-o coordinate plane based on the o-axis configured differently from the first d-q-o coordinate plane; obtaining an output voltage vector for determining a fault location by performing d-q transform on the second d-q-o coordinate plane; determining occurrence of a fault and an area related to the fault based on the output voltage vector; and in the occurrence of the fault, allocating a zero voltage vector to the area related to the fault.

Method for controlling fault using switching technique of three phase four wire interlinking converter

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Seoul, South Korea

Tae Gyu Kim