Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Tadayoshi Nakatsuka

Katsushi Tara

Shinji Fukumoto

Hideki Yagita

Kenichi Hidaka

Atsushi Suwa

Eiji Yasuda

Taketo Kunihisa

Kazuhiro Yahata

Yukio Sakai

Masakazu Adachi

Masanori Minamio

Kaoru Inoue

Toshiyuki Fukuda

Shinji Yamamoto

Akiyoshi Tamura

Yorito Ota

Hiromasa Fujimoto

Hiroyuki Masato

Katsuhiko Kawashima

Junko Iwanaga

Mitsuru Nishitsuji

Michiaki Tsuneoka

Noboru Takeuchi

Fumihiko Kawai

Junji Itoh

Atsushi Watanabe

Jyunji Itoh

Shuichi Ogata

Yasuyuki Masumoto

Toshiharu Tambo

Motoo Nakagawa

Tomohiko Nakamura

Katsuyoshi Tara

Masashi Miyagi

Tadashi Komatsu

Takahiro Kitazawa

The present invention includes a die pad; signal leads, ground connection leads connected to the die pad; a semiconductor chip including electrode pads for grounding; metal thin wires, and an encapsulating resin for encapsulating the die pad and the semiconductor chip and encapsulating the signal leads and the ground connection lead such that lower portions of the signal leads and the ground connection lead are exposed as external terminals. The ground connection lead is connected to the electrode pad for grounding, so that the resin-encapsulated semiconductor device is electrically stabilized. Furthermore, interference between high frequency signals passing through the signal leads can be suppressed by the die pad and the ground connection leads.

Resin encapsulated semiconductor device and method for manufacturing the same

The first terminals of a plurality of resistor elements are connected to the intermediate connection points of a plurality of FETs connected in series, and a voltage, having a phase opposite to that of the voltage applied to the gate terminals of the plurality of FETs, is applied to the second terminals of the plurality of resistor elements. With this configuration, the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering. As a result, the power that can be handled can be increased. Furthermore, since the potentials at the intermediate connection points of the plurality of FETs connected in series can be prevented from lowering, the deterioration of the distortion characteristic and the isolation characteristic owing to the lowering of the potentials at the intermediate connection points of the plurality of field-effect transistors connected in series is prevented, and excellent high-frequency characteristics are obtained.

High-frequency switching device and semiconductor

When a low level voltage is inputted to an input terminal IN, a transistor EFenters a blocked state, a first switch circuit SWenters a conduction state, and a second switch circuit SWenters the blocked state. Accordingly, a boosted voltage outputted from a voltage booster circuit CP is applied to a load R. When a high level voltage is inputted to the input terminal IN, the transistor EFenters the conduction state, the first switch circuit SWenters the blocked state, and the second switch circuit SWenters the conduction state. Accordingly, a voltage equivalent to that at the external power supply terminal VDD is applied to the load R. Therefore, although a current constantly flows through the transistor EFwhen the boosted voltage is not required, such situation does not affect a current supplied from the voltage booster circuit CP.

Current control circuit used for voltage booster circuit

A common terminalis connected to drains of FETsandvia a capacitorFETstoare serially connected, and inserted between a source of the FETand a terminalvia a capacitorSimilarly, each of: FETstoFETstoFETstoFETstoand FETstois inserted between the source of the FETor an FETand a corresponding one of terminalstoThis configuration allows a stray capacitance value of a transmission/reception path to be reduced at the time of transmission/reception, thereby obtaining a favorable radio-frequency characteristic.

Radio-frequency switching circuit and semiconductor device

A high-frequency switching apparatus is composed of a transfer circuit unit including a plurality of FETs, and a shunt circuit unit including a plurality of FETs, as well. An electromagnetic wave absorption material element is connected to an end of the shunt circuit unit. To a connection point between the shunt circuit unit and the electromagnetic wave absorption material element, an external voltage terminal for fixing a potential at the point is connected. By this, a high-frequency switching apparatus is obtained which is excellent in isolation characteristics and is hard to break down even when a signal of a high voltage, such as an electrostatic surge, flows into the apparatus.

High-frequency switching apparatus

Switch sections composed of a plurality of FETstoandtoconnected in series are provided between input/output terminalsandand ground terminalsand, and between the input/output terminalsto. A plurality of gate bias resistorstotoare also provided. One terminal of each gate bias resistor is connected to a gate electrode of a corresponding one of the FETstoandto, while a control voltageandfor switching an ON state and an OFF state of the switch section is applied to the other terminal. Among the FETs included in each switch section, concerning the FETs, andto which signal power is applied when the switch section is in the OFF state, the gate bias resistors, andconnected to the gate electrodes are set to have a highest resistance value.

Radio-frequency switch circuit and semiconductor device

A diode logic circuit which can select a high voltage from among the voltages of a number of control voltage input terminals using a number of diodes made of Schottky junctions is integrally formed on a compound semiconductor substrate on which MESFET stages for switching and for securing isolations have been formed. In addition, the MESFET stages for switching are controlled by the voltages of the number of control voltage input terminals and the MESFET stages for securing isolations are controlled by the OR voltage that is outputted from the diode logic circuit.

High frequency switching circuit device

High-frequency switching device and semiconductor device

A high-frequency switch circuit arrangement. A plurality of stages (for example, two stages) of capacitative elements connected in series (Cand C, Cand C) are used in a shunt path of a high-frequency component. If a surge voltage is applied, the voltage that each capacitative element should bear decreases in inverse proportion to the number of the connection stages. Consequently, the surge resistance of the capacitative element is improved. The capacitative elements connected in series can be manufactured using the usual manufacturing process of compound semiconductor devices and if the structure of the invention is adopted, a protective diode need not be provided. As the capacity is made common and the device structure is designed, the high-frequency switch circuit arrangement can be further made compact, etc.

High-frequency switch circuit arrangement

A semiconductor apparatus is provided which makes it possible to reduce the number of control terminals required for switching through paths of a high frequency signal, simplify the circuit configuration for controlling the terminals, improve an isolation characteristic between on path and off path of a through FET, and obtain a sufficiently high isolation. In this semiconductor apparatus, one specific through FET and each of shunt FETs connected to each of through FETs other than the one specific through FET are simultaneously turned on in response to the same control signal inputted to the same control terminal. Thus, when a high frequency signal leaks from an output terminal to the signal path of the through FET having been turned on, through the signal paths of the through FETs having been turned off, the high frequency signal can be released to GND through the shunt FET having been turned on.

Semiconductor switching circuit for switching the paths of a high frequency signal in a mobile communications unit

Four switching circuit sections consisting of four FETs connected in series are provided between a plurality of input/output terminals which output and input a high frequency signal. Gate control voltages are individually applied to gate terminals of four FETs, respectively, so that an on-state and an off-state are achieved. Further drain control voltages are individually applied to drain terminals or source terminals of the FET in each switching circuit section, and a voltage according to an electric power value of the high frequency signal supplied to each of switching circuit sections is supplied as the gate control voltage and the drain control voltage.

High frequency switching circuit and semiconductor device

An RF switching circuit according to the present invention includes: a plurality of input/output terminals for inputting and outputting an RF signal; and a switch for opening and closing an electrical connection between the input/output terminals. The switch is constituted by a multi-gate field effect transistor including a plurality of gates located between source and drain spaced from each other on a semiconductor layer. A bias voltage is applied to an inter-gate region of the semiconductor layer between the gates. The bias voltage is equal to or lower than 90% of a high-level voltage, which is a voltage for turning the multi-gate field effect transistor ON, in a state where the multi-gate field effect transistor is ON, and is equal to or higher than 80% of the high-level voltage and equal to or lower than the high-level voltage in a state where the multi-gate field effect transistor is OFF.

RF switching circuit for use in mobile communication systems

A field effect transistor switch circuit may include: () first, second, and third switch terminals; () a first field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the second switch terminal; and () a second field effect transistor, a pair of the main electrodes of which are connected respectively to the first switch terminal and the third switch terminal. A first resistor is connected between a control electrode and any one of the pair of the main electrodes of the first field effect transistor, and a second resistor is connected between a control electrode and any one of the pair of the main electrodes of the second field effect transistor.

Field effect transistor switch circuit

One end of each of five resistors is connected to each of the two ends and the respective intermediate points of a cascade of four depression-type FETs, while the other ends of the five resistors are provided with a predetermined voltage. This configuration fixes the source-drain potential of the four FETs. This fixing of the source-drain potential of the FETs permits stable application of a bias voltage for turning ON the FETs between the gate and the source each FET, so as to ensure the ON-OFF switching of the FETs.

High frequency switch circuit

Growing community of inventors

Toyonaka, Japan

Tadayoshi Nakatsuka