Sumitomo Electric Device Innovations, Inc.

Sumitomo Electric Industries, Limited

Tadashi Watanabe

Hajime Matsuda

Takahide Hirasaki

A method for manufacturing a semiconductor device includes steps of forming a first photoresist film on a semiconductor substrate, and forming a second photoresist film having a higher acidity than the first photoresist film on the first photoresist film, forming an opening for exposing a surface of the semiconductor substrate by patterning the first photoresist film and the second photoresist film, applying a shrink material to an upper surface of the second photoresist film and an inside of the opening, and reacting the shrink material and the second photoresist film in the inside of the opening by heat-treating the first photoresist film, the second photoresist film and the shrink material, and removing an unreacted shrink material that do not react with the second photoresist film from the upper surface of the second photoresist film and the inside of the opening.

Method for manufacturing semiconductor device

A method for manufacturing a semiconductor device includes steps of forming a protective film on a semiconductor substrate, forming a resist film on the protective film such that the resist film includes a region where the resist film becomes thicker from a drain electrode to a source electrode, forming a first opening in the resist film by irradiating the resist film in the region with an electron beam and developing the resist film, forming a second opening that exposes an upper surface of the semiconductor substrate by removing the protective film using the resist film in which the first opening is formed as a mask, forming a third opening in the resist film by further developing the resist film after forming the second opening, the third opening being formed by expanding the first opening toward the drain electrode, and forming a gate electrode in the second and the third openings.

A process of forming a field effect transistor (FET) of a type of high electron mobility transistor (HEMT) reducing damages caused in a semiconductor layer is disclosed. The process carries out steps of: (a) depositing an insulating film on a semiconductor stack; (b) depositing a conductive film on the insulating film; (c) forming an opening in the conductive film and the insulating film by a dry-etching using ions of reactive gas to expose a surface of the semiconductor stack; and (d) forming a gate electrode to be in contact with the surface of the semiconductor stack through the opening, the gate electrode filling the opening in the conductive film and the insulating film.

Process of forming high electron mobility transistor (HEMT) and HEMT formed by the same

A high electron mobility transistor (HEMT) includes a semiconductor layer on a substrate; an insulating film on the semiconductor layer; a gate electrode in contact with a surface of the semiconductor layer through an opening in the insulating film; and a conductive film provided between the insulating film and a portion of the gate electrode at peripheries of the opening. The insulating film and the conductive film are made of respective materials containing silicon (Si). The gate electrode includes a Schottky metal in contact with the semiconductor layer and a cover metal provided on the Schottky metal. The Schottky metal covers the conductive film thereunder.

A process of forming an epitaxial substrate is disclosed, where the epitaxial substrate includes a nucleus forming layer made of aluminum nitride (AlN) grown on a substrate made of silicon carbide (SiC). The process includes steps of: (1) first measuring the first reflectivity Rof a surface of the SiC substrate, (2) growing the nucleus forming layer made of AlN as measuring second reflectivity Rof a grown surface of the AlN nucleus forming layer, and (3) ending the growth of the AlN nucleus forming layer when a ratio R/Rof the reflectivity enters a preset range.

Process of forming semiconductor substrate by use of normalized reflectivity

A process of forming an epitaxial substrate that includes nitride semiconductor layers is disclosed. The process includes steps of; (a) growing a nucleus forming layer on the substrate, and (b) growing a nitride semiconductor layer on the nucleus forming layer. The step (a) sets first and second growth temperatures in an upstream side and a downstream side, respectively, of the substrate for the flow of the source gases, where the first temperature of the upstream side is at least 5&#xb0; C. but at most 10&#xb0; C. lower than the second temperature of the downstream side, and the second temperature is higher than 1100&#xb0; C.

Process of producing epitaxial substrate

A surface treatment method for a semiconductor layer includes growing a first layer on a substrate in a growth reactor, the first layer consisting of one of gallium nitride, aluminum gallium nitride and indium aluminum nitride; growing a second layer of gallium nitride on a surface of the first layer, the gallium nitride of the second GaN layer having a composition ratio of gallium to nitrogen larger than 2; taking the substrate out of the growth reactor after growing the second layer; and removing the second layer after taking the substrate out of the growth reactor.

Method for treating surface of semiconductor layer, semiconductor substrate, method for making epitaxial substrate

A process of forming a semiconductor device by use of a MOCVD technique is disclosed. The semiconductor device, which is made of primarily nitride semiconductor materials, includes a GaN channel layer, an AlGaN barrier layer, and a GaN cap layer on a substrate. The barrier layer and the cap layer are grown under a gradient temperature condition where the upstream side of the substrate with respect to the flow of the MOCVD source gases is at a higher temperature as compared with the temperature at the downstream side of the substrate with respect to the flow of the source gases.

Process of forming nitride semiconductor layers

A semiconductor device having a via hole whose side surface is covered with nitride metal is disclosed. The via hole is formed within an insulating region that surrounds a conductive region, where both regions are made of nitride semiconductor materials. The via hole is filled with a back metal and in side surfaces thereof is covered with the nitride metal which is heat treated at a preset temperature for a preset period. Nitrogen atoms in the nitride metal diffuse into the nitride semiconductor materials in the insulating regions and compensate nitride vacancies therein. The interface between the nitride metal and the nitride semiconductor material is converted into an altered region that shows enough resistivity to suppress currents leaking from the via hole metal to the conductive region of the nitride semiconductor material.

Growing community of inventors

Yokohama, Japan

Tadashi Watanabe