Hitachi, Ltd.

Other

Tadashi Umezawa

Masayuki Kojima

Motohiko Yoshigai

Takafumi Tokunaga

Satoru Yamada

Hideo Aoki

Isamu Asano

Yoshitaka Nakamura

Tokuo Kure

Tetsuo Ono

Tsuyoshi Tamaru

Nobuyoshi Kobayashi

Yasushi Goto

Hiroshi Kawakami

Takashi Sato

Tatsumi Mizutani

Naoki Fukuda

Hidekazu Goto

Keizou Kawakita

Makoto Yoshida

Hiroshi Akiyama

Hiroshi Hasegawa

Kazuo Nojiri

Masayoshi Saito

Yoshikazu Ohira

Kunihiko Katou

A surface processing method of a sample having a mask layer that does not contain carbon as a major component formed on a substance to be processed, the substance being a metal, semiconductor and insulator deposited on a silicon substrate, includes the steps of installing the sample on a sample board in a vacuum container, generating a plasma that consists of a mixture of halogen gas and adhesive gas inside the vacuum container, applying a radio frequency bias voltage having a frequency ranging from 200 kHz to 20 MHz on the sample board, and controlling a periodic on-off of the radio frequency bias voltage with an on-off control frequency ranging from 100 Hz to 10 kHz.

Sample surface processing method

A semiconductor integrated circuit device and a manufacturing method therefor provide advantages that undulations are prevented from being produced in polycrystal silicon plugs in bit line contact holes and that the undesired phenomenon of transversally etching silicide film at contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines formed when forming a first wiring layer are made of a laminate film having a titanium film, a titanium nitride film and a tungsten film, and a titanium silicide film containing nitrogen or oxygen is formed in contact areas of the bit lines and plugs. A titanium silicide film containing nitrogen or oxygen is also formed in contact areas of the first wiring layer and semiconductor substrate. The titanium silicide film may be replaced by silicide film containing nitrogen or oxygen, cobalt silicide film containing nitrogen or oxygen or cobalt silicide film.

Dynamic random access memory with improved contact arrangements

Method for processing surface of sample

A semiconductor integrated circuit device and a method of manufacturing such a device provides the advantages that undulations are prevented from being produced in the polycrystal silicon plugs in the bit line contact holes and that the undesired phenomenon of transversally etching the silicide film at the contacts of the bit lines and the polycrystal silicon plugs is avoided. The bit lines BL formed at the time of forming a first wiring layer,is made of a laminate film having a titanium film,a titanium nitride film,and a tungsten film,and a titanium silicide film,containing nitrogen or oxygen is formed in the contact areas of the bit lines BL and the plugs,A titanium silicide film,containing nitrogen or oxygen is also formed in the contact areas of the first wiring layer,and the semiconductor substrate,The titanium silicide film,may be replaced by a tungsten silicide film containing nitrogen or oxygen, a cobalt silicide film containing nitrogen or oxygen or a cobalt silicide film.

Semiconductor integrated circuit device and method of manufacturing the same

Described is a process for manufacturing a semiconductor integrated circuit device, to expose semiconductor regions over the surface of a semiconductor substrate in self-alignment to wiring lines (including gate electrodes) and element isolating regions when forming connection holes. The process includes a first step of coating a semiconductor substrate with a first conductive film, a first insulating film and a second insulating film sequentially, and patterning these films to form first conductive film patterns. A third insulating film is then formed over the semiconductor substrate, on the side walls of the first conductive film patterns and over the second insulating film, and a fourth insulating film is formed over the third insulating film. After forming the third and fourth insulating films, a mask for a first opening between adjoining ones of the first conductive film patterns is formed over the fourth insulating film, and the fourth insulating film exposed from the first opening of the mask is etched, under conditions that the fourth insulating film is more easily etched off than the third and second insulating films, to form a second opening in the fourth insulating film. Thereafter, the third insulating film, as exposed through the second opening, is anisotropically etched under conditions that the third insulating film is more easily etched off than the first insulating film and the fourth insulating film, to form a third opening.

Process for manufacturing semiconductor integrated circuit device

In order to provide a method of treating a multilayer including metal and polysilicon for use in a conductor or a gate electrode of a semiconductor device with high accuracy at a high selectivity, the temperature of a sample is maintained at 100&deg; C. or higher at the time of etching a metal film to increase the etch rate of the metal film. In order to suppress the etch rate of a polysilicon film and prevent side etching, an oxygen gas is added to a gas containing a halogen element. In order to suppress the etch rate of a silicon oxide film at the time of etching the polysilicon film, the etching is performed with etch parameters which are divided into those for the metal film and those for the polysilicon film. In the etching performed to the multilayer containing metal and polysilicon, by etching the metal film at a high temperature of 100&deg; C. or higher, the etch rate of the metal film becomes high. Consequently, there is no partial etch residue of the metal film and a barrier film. By switching the parameters to those with which the polysilicon film can be etched at a high selectivity with respect to an oxide film at the time point of completion of etching to the barrier film, very accurate treatment can be realized.

Method of treating surface of sample

Growing community of inventors

Oume, Japan

Tadashi Umezawa