Tdk Corporation

Tadashi Ogasawara

Dai Matsuoka

Makoto Morita

Isao Fujiwara

Ryuichi Tanaka

Masahiro Yahagi

Teruo Taguchi

Masahiko Konno

Shouichi Iwaya

Setuo Sasaki

Masaru Fukuda

Masaaki Taniguchi

Kaneo Mori

Hidetaka Kitamura

Shigeru Itou

Hitoshi Kudou

Mikikazu Takehana

Toshio Marui

A chip shaped electronic device comprising an element body including zinc oxide material layers and internal electrode layers, wherein when assuming a minimum distance from an outermost side of the internal electrode layer in the stacking direction to a surface of the element body is 1 and measuring an ion intensity ratio of Li and Zn, (Li/Zn), in a range from the surface of the element body to a depth of (0.9&times;1) by a secondary ion mass spectrometry (SIMS), 0.001&lE;(Li/Zn)&lE;500. According to the invention, it is possible to provide a chip shaped electronic device, such as a multilayer chip varistor, not requiring glass coating or other insulative protective layer, being tolerant of temperature changes, capable of maintaining high resistance of an element surface even by reflow soldering, being highly reliable, and capable of being easily produced, and a method of producing the same.

Chip shaped electronic device and a method of producing the same

A laminate type varistor has at least one pair of first and second inner electrodes and a varistor layer. The at least one pair of first and second electrodes and the varistor layer are laminated. A first outer electrode and a second outer electrode electrically are connected to the first inner electrode and the second inner electrode, respectively. In the laminate type varistor, the first inner electrode and the first inner electrode are separated by a predetermined distance from the outer electrode so that the first inner electrode has no electrode surface facing to an electrode surface of the second inner electrode.

Laminate type varistor

A laminated chip varistor has a varistor element including at least one varistor layer and at least two inner electrodes which are laminated alternatively, and outer most layers comprising the same material as the varistor layer; and terminal electrodes electrically connected to the inner electrodes each formed at each of the both edge portions of the varistor element; wherein a surface roughness (R) of the varistor element is in the range of 0.60 to 0.90 .mu.m.

Laminated chip varistor and production method thereof

A voltage-dependent nonlinear resistor or varistor ceramic composition consists essentially of (1) an oxide of the formula: {Sr.sub.(1-x-y) Ba.sub.x Ca.sub.y }.sub.z TiO.sub.3 wherein 0.3&lt;x.ltoreq.0.9, 0.1.ltoreq.y.ltoreq.0.5, x+y.ltoreq.1, and 0.84&lt;z&lt;1.16, (2) 0.001 to 5.000 mol % of at least one oxide of niobium, tantalum, tungsten, manganese or R wherein R is yttrium or lanthanide, (3) 0.001 to 5.000 mol % of SiO.sub.2, and (4) 0.001 to 5.000 mol % of MgO. When the varistor voltage is controlled by changing a re-oxidizing temperature without changing the composition, a satisfactory nonlinear index .alpha. is available over a wide range of varistor voltage. The dependency of varistor voltage on heat treating temperature is reduced.

Voltage-dependent nonlinear resistor ceramics

High voltage capacitor and magnetron

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Tokyo, Japan

Tadashi Ogasawara