Mitsubishi Denki Kabushiki Kaisha

Mitsubishi Materials Corporation

Agency of Industrial Science and Technology

Kozo Iizuka, Director General, Agency of Industrial Science and

Other

Mitsubishi Denki K.k.

Kozo Iizuka, Director General, Agency of Industrial Science & Technology

Tadashi Nishimura

Yasuo Inoue

Yasuo Yamaguchi

Toshiaki Iwamatsu

Kazuyuki Sugahara

Shigeru Kusunoki

Takashi Ipposhi

Tetsuya Nakai

Kazutami Arimoto

Kazuyasu Fujishima

Tadato Yamagata

Takahiro Tsuruda

Hiroshi Kimura

Akihiko Ohsaki

Yoichi Akasaka

Akira Ishizu

Hiroshi Shinyashiki

Shigenobu Maeda

Hidekazu Oda

Shigeto Maegawa

Hideaki Arima

Yuuichi Hirano

Takaaki Fukumoto

Shuji Nakao

Takahisa Eimori

Motoi Ashida

Kiyoteru Kobayashi

Yoshihiro Hirata

Yoji Mashiko

Masahiro Yoneda

Kazuhito Tsutsumi

Toshiyuki Oashi

Jiro Matsufusa

Hiroshi Morita

Tsuyoshi Yamano

Shigeru Kusunori

Kazukyuki Sugahara

According to a semiconductor device of the present invention, a field oxide film is formed so as to cover the main surface of an SOI layer and to reach the main surface of a buried oxide film. As a result, a pMOS active region of the SOI and an nMOS active region of the SOI can be electrically isolated completely. Therefore, latchup can be prevented completely. As a result, it is possible to provide a semiconductor device using an SOI substrate which can implement high integration by eliminating reduction of the breakdown voltage between source and drain, which was a problem of a conventional SOI field effect transistor, as well as by efficiently disposing a body contact region, which hampers high integration, and a method of manufacturing the same.

Semiconductor device and method of manufacturing the same

A semiconductor device in which parasitic resistance of source/drain regions can be reduced than the parasitic resistance of the drain region, and manufacturing method thereof, can be obtained. In the semiconductor device, inactivating ions are implanted only to the source region of the semiconductor layer, so as to damage the crystal near the surface of the semiconductor layer, whereby siliciding reaction is promoted. Therefore, in the source region, a titanium silicide film which is thicker can be formed.

Semiconductor device having metal silicide film and manufacturing method thereof

A semiconductor device for CSP mounting which avoids errors due to alpha rays and is highly stress-resistant is provided. A buried oxide film ( ) is formed on a semiconductor substrate ( ), and a MOS transistor having an SOI structure is formed on the buried oxide film ( ). The MOS transistor comprises source and drain regions ( ) formed in a semiconductor layer ( ), and a gate electrode ( ). An aluminum pad ( ) connected to any one of the source and drain regions ( ) through a connecting mechanism not shown, and a silicon nitride film ( ) having an opening on the top of the aluminum pad ( ) are formed on an interlayer insulation film ( ). A layer of titanium ( ) and a layer of nickel ( ) are formed extending from the aluminum pad ( ) to an end of the silicon nitride film ( ). A solder bump ( ) is disposed on the layer of nickel ( ).

SOI based transistor inside an insulation layer with conductive bump on the insulation layer

A semiconductor device includes a MOS-type field effect transistor (SOI-MOSFET) formed on a thin silicon layer on an insulator layer. The SOI-MOSFET has a gate overlap-type LDD structure in which additional source/drain regions having an impurity concentration of 3&times;10 to 3&times;10 /cm overlapping with a gate electrode are provided in the silicon layer. According to this structure, when the SOI-MOSFET is on operation, only the additional source/drain regions are depleted, so that it is possible to obtain satisfactory transistor characteristics. Additional source/drain regions in this structure are formed by combination of vertical ion implantation using the gate electrode as a mask and thermal diffusion or oblique ion implantation using the gate electrode as a mask.

Semiconductor device having different field oxide sizes

In a semiconductor device and a method of manufacturing the same, an isolating and insulating film is provided at an end neighboring to a second impurity region with a groove extended to a semiconductor substrate. This removes a crystal defect existed at the end of the isolating and insulating film, and thus prevents leak of a current at this portion from a storage node. Consequently, provision of the groove at the edge portion of the isolating oxide film neighboring to the impurity region removes a crystal defect at this region, and thus eliminates a possibility of leak of a current.

Method of manufacturing semiconductor device

Semiconductor device having a common substrate bias

Semiconductor device having metal silicide film

Generation of parasitic transistor in active layer edge is prevented. In an NMOS region of a semiconductor layer (21) on an insulating film (20), boron ions are implanted by rotary oblique injection, using a nitride film (23) and a resist (253a) as mask. In the vicinity of a region for separating element by LOCOS method, that is, only in the edge region of the semiconductor layer (21) as the active layer of NMOS transistor, boron ions are implanted by about 3.times.10.sup.13 /cm.sup.2. After LOCOS oxidation, the impurity concentration is heightened to such a level as the boron ions may not be sucked up into the oxide film.

Method of making a semiconductor device having an SOI structure

Oxygen ion is implanted into a silicon substrate to remain a silicon layer on a surface of the silicon substrate. In this state, a silicon oxide layer is formed under the silicon layer. Silicon oxide particles are formed and remained in the residual silicon layer. While maintaining this state, the silicon substrate is heated to a predetermined temperature not less than 1300.degree. C. Alternatively, the silicon substrate is heated at a high temperature-rise rate to 900-1100.degree. C., and thereafter is heated at a low temperature-rise rate to the temperature not less than 1300.degree. C. The silicon substrate is held at the predetermined temperature not less than 1300.degree. C. for a predetermined time, whereby crystallinity of the residual silicon layer is restored. A pinning effect of the silicon oxide particles prevents the rise of dislocation to the surface of the SOI layer, and also suppresses a rate per a unit time at which interstitial silicon generates during the heating to the high temperature region. Therefore, a dislocation density of the SOI layer can be reduced.

SOI substrate having monocrystal silicon layer on insulating film

Method of manufacturing semiconductor substrate having total and partial

Oxygen ion is implanted into a silicon substrate to remain a silicon layer on a surface of the silicon substrate. In this state, a silicon oxide layer is formed under the silicon layer. Silicon oxide particles are formed and remained in the residual silicon layer. While maintaining this state, the silicon substrate is heated to a predetermined temperature not less than 1300.degree. C. Alternatively, the silicon substrate is heated at a high temperature-rise rate to 900.degree.-1100.degree. C., and thereafter is heated at a low temperature-rise rate to the temperature not less than 1300.degree. C. The silicon substrate is held at the predetermined temperature not less than 1300.degree. C. for a predetermined time, whereby crystallinity of the residual silicon layer is restored. A pinning effect of the silicon oxide particles prevents the rise of dislocation to the surface of the SOI layer, and also suppresses a rate per a unit time at which interstitial silicon generates during the heating to the high temperature region. Therefore, a dislocation density of the SOI layer can be reduced.

Method of manufacturing a SOI substrate having a monocrystalline silicon

A buried insulating layer is provided in a semiconductor substrate, in a position separated from its major surface. A LOCOS isolation film is provided in the major surface of the semiconductor substrate for isolating an active region from other active regions. A thin-film transistor is provided in the active region. The thin-film transistor comprises a gate electrode which is provided on the active region with interposition of a gate insulating layer. A pair of source/drain layers are provided in the major surface of the semiconductor substrate on both sides of the gate electrode. A high-concentration impurity layer is provided in the semiconductor substrate immediately under the buried insulating layer.

Thin-film transistor having a buried impurity region and method of

Growing community of inventors

Hyogo, Japan

Tadashi Nishimura