Mitsubishi Denki Kabushiki Kaisha

Tadashi Miyagi

Takayuki Saito

Yoshiaki Yamada

Naoki Yasuda

Takeo Ishibashi

Toshiyuki Toyoshima

Kanji Sugino

Takuya Matsushita

A product pattern and a test pattern for managing a focus offset value are patterned onto a product wafer by means of exposure, and is patterned onto the product wafer by means of exposure. The exposed product wafer is developed. A measurement section measures the dimension of the test pattern patterned on the product wafer. On the basis of the thus-measured dimension of the test pattern, the focus off set value set in a system for manufacturing a semiconductor device is computed by a computation section. The focus offset value set in a projection optical system of the system for manufacturing a semiconductor device is adjusted by means of an adjustment section so as to become identical with the computed focus offset value.

System for manufacturing semiconductor device utilizing photolithography technique

A hot plate unit includes a cover. The cover includes an inner wall and an outlet. There is provided immediately under the outlet a plate having a ventilation hole. The distance between the plate and a main surface is identical to the distance between the main surface and the internal wall face. The hot plate unit has an displacement control valve for restricting displacement at a level in the range from at least 0.1 L/min to at most 1 L/min.

Semiconductor manufacturing device and method of processing wafer

There is described a method of stably manufacturing a fine resist pattern narrower than the wavelength of exposing light from a stepper. Under the method, a resist pattern is formed on a semiconductor substrate through use of an acid catalyst chemically-amplified photoresist, and an organic film which includes an acid or which produces an acid on exposure to light is formed on the surface of the semiconductor substrate including the resist pattern. The organic film is then subjected to a heat treatment to thereby diffuse an acid. The surface layer of the resist pattern is made soluble in an alkaline developer, and the surface layer of the resist pattern is removed through use of the alkaline developer. As a result, a fine resist pattern is formed.

Method of manufacturing a semiconductor device having a fine pattern, and semiconductor device manufactured thereby

Growing community of inventors

Tokyo, Japan

Tadashi Miyagi