Nec Corporation

Renesas Electronics Corporation

Mitsubishi Electric Corporation

Nec Electronics Corporation

Tadashi Maeda

Tomoyuki Yamase

Shinichi Uchida

Noriaki Matsuno

Shinpei Watanabe

Keiichi Numata

Shigeru Tanaka

Tomonobu Kurihara

Yuu Yamaguchi

Kazuo Henmi

Orie Tsuzuki

Yoshinori Horiguchi

Isao Sakakida

Takeshi Yagi

Hitoshi Yano

Masahiro Fujii

Yasuo Ohno

Yutaka Hirota

Seiji Haga

Nobuhide Yoshida

Kazushi Horie

Takao Atsumo

Hideyuki Yoshizawa

Kazuto Minagawa

The unit coil is formed by: bending the coil end portions of the intermediate body such that, in a layer in which a length in an axial direction between the coil end portions is large, positions of the coil end portions projecting furthest from the accommodation portions in the axial direction move away from positions of the accommodation portions in the stacking direction, compared to the previous state; and aligning the positions, in the axial direction, of the coil end portions at an inner side of the annular shape, for each of the layers.

Method for manufacturing unit coil for stator of rotary electric machine, device for manufacturing unit coil for stator of rotary electric machine, rotary electric machine, and method for manufacturing a rotary electric machine

A semiconductor device includes a first semiconductor chip including a first plurality of wiring layers, and a first coil, a first bonding pad, and first dummy wires formed in an uppermost layer of the first plurality of the wiring layers, and a second semiconductor chip including a second plurality of wiring layers, a second coil, a second bonding pad, and second dummy wires formed in an uppermost layer of the second plurality of the wiring layers. The first semiconductor chip and the second semiconductor chip face each other via an insulation sheet. The first coil and the second coil are magnetically coupled with each other.

Semiconductor device

Dielectric breakdown is prevented between opposing two semiconductor chips, to improve the reliability of a semiconductor device. A first semiconductor chip has a wiring structure including a plurality of wiring layers, a first coil formed in the wiring structure, and an insulation film formed over the wiring structure. A second semiconductor chip has a wiring structure including a plurality of wiring layers, a second coil formed over the wiring structure, and an insulation film formed over the wiring structure. The first semiconductor chip and the second semiconductor chip are stacked via an insulation sheet with the insulation film of the first semiconductor chip and the insulation film of the second semiconductor chip facing each other. The first coil and the second coil are magnetically coupled with each other. Then, in each of the first and second semiconductor chips, wires and dummy wires are formed at the uppermost-layer wiring layer.

A semiconductor device includes a first semiconductor chip that includes a first main surface, a first inductor formed on the first main surface, and a first external connection terminal formed on the first main surface; a second semiconductor chip that includes a second main surface, a second inductor formed on the second main surface, a second external connection terminal formed on the second main surface; and a first insulating film that is located between the first semiconductor chip and the second semiconductor chip, wherein the first semiconductor chip and the second semiconductor chip overlap each other such that the first main surface and the second main face each other, the semiconductor device includes a facing region in which the first semiconductor chip and the second semiconductor chip overlap each other when seen in a plan view.

In a first semiconductor chip, a first multilayer interconnect layer is formed on a first substrate, and a first inductor is formed in the first multilayer interconnect layer. In a second semiconductor chip, a second multilayer interconnect layer is formed on a second substrate. A second inductor is formed in the second multilayer interconnect layer. The first semiconductor chip and the second semiconductor chip overlap each other in a direction in which the first multilayer interconnect layer and the second multilayer interconnect layer face each other. In addition, the first inductor and the second inductor overlap each other when seen in a plan view. At least one end of a first insulating film does not overlap the end of a facing region, in a Y direction.

The totally-enclosed fan-cooled motor includes the stator; the rotor; the drive side bracket; the counter drive side bracket; a pair of the bearings; the external fan that sends cooling air to the stator; the internal fan; the heat radiator that is arranged on an outer side of the drive side bracket and is mounted on the rotation shaft; the cover that contains a joint, which connects the rotation shaft extending to an outer side of the drive side bracket of the motor and a reduction gear, and is provided in parallel with the joint; and the ventilation path that is arranged between the drive side bracket and an end of the cover, and includes the outlet causes the cooling air induced by rotation of the heat radiator to flow to the heat radiator and discharges the cooling air outside the motor.

Totally-enclosed fan-cooled motor

A non-linear effect of a rectifier element is enhanced, an input amplitude is increased by further taking advantage of a resonance circuit, and a rectification efficiency of a rectifier circuit for detection is improved, so that the gain of an amplifier circuit at a latter stage can be set low. RF input terminalsare applied with signals at phases opposite to each other. A signal at terminalis applied to a gate of transistor Mthrough capacitor C, and a signal at terminalis applied to node Nconnected with a source of transistor Mand a gate and a drain of transistor Mthrough capacitor Cdesignate terminals applied with DC biases, and L, Cand L, Care series resonance circuits. Half-wave double voltage rectifier circuits comprised of M, M, C-C, Rare connected in cascade at a plurality of stages.

Start signal detector circuit

A phase comparator is provided that solves the problem that a VCO cannot be controlled with high precision. A frequency divider frequency-divides a VCO signal applied as input to an input terminal () in steps, and supplies the VCO signals of each step as output. A latch unit latches the VCO signal that is applied to the input terminal () and each VCO signal that was supplied from the frequency divider based on a reference signal that is applied to an input terminal (). An output unit supplies the latch results realized by the latch unit as phase difference signals that indicate phase differences of the reference signal and the VCO signals.

Phase comparator and phase-locked loop

An information storage device includes a storage that stores transfer data from an information processing device, the information storage device being removably connected to the information processing device, a switch unit that switches a data transfer mode of the information processing device in accordance with manipulation by a user, and a controller that controls the information processing device to transfer data in a mode in which data temporarily stored in a data storing area is transferred to the storage or in a mode in which data is transferred to the storage without being temporarily stored in the data storing area in accordance with the selection of the data transfer mode by the switch unit.

Information storage device, information processing system, and setting method of data transfer mode of information processing device

A signal processing device includes a detecting part that detects intensity of an input signal, a timer part that includes a time constant circuit and measures time based on a time constant of the time constant circuit, and a determination circuit that counts the number of times of switching of the input signal detected by the detecting part within the time measured by the time constant circuit.

Signal processing device

The present invention is aimed at realizing an amplifying circuit whose chip size is prevented from being significantly increased even if the number of compatible frequencies increases, and which has a wide dynamic range when it operates under a low voltage. The amplifying circuit includes a plurality of impedance converting circuits connected to each other by a switching circuit of a first type having a signal cutting-off function, a switching circuit of a second type connected to a path branched from an input side of the switching circuit of the first type, the switching circuit of the second type having a signal cutting-off function, amplifiers connected respectively to an output side of one of the impedance converting circuits in a final stage and to an output side of the switching circuit of the second type, and a control signal generating circuit for controlling connection/disconnection between said switching circuit of the first type and said switching circuit of the second type; wherein either one of the paths is selected to input a signal to one of the amplifiers.

Amplification circuit

A cooling device of an electric motor for a vehicle for receiving cooling air into the electric motor through a suction port according to the rotation of a rotor shaft on which a rotor core, which is disposed opposite to a stator core, is installed. The cooling device includes an air volume regulating mechanism regulating a cooling air volume received therein through the suction port according to an ambient temperature. Since the cooling air volume received in the cooling device through the suction port is regulated according to the ambient temperature, the cooling of the electric motor can be optimized, and noise generated can be efficiently reduced according to the ambient temperature.

Cooling device of electric motor for vehicle

A variation of a threshold of diode-connected transistors is compensated for to maintain a constant rectification efficiency of a rectifier circuit, thereby enabling stable detection of a start signal. A constant voltage is applied to DC bias terminalof cascaded half-wave voltage doubler rectifier circuits (including MOS transistors Mto Mand capacitors Cto C) forming a rectifier circuit, and a voltage equal to the sum of the constant voltage applied to DC bias terminaland a variation &#x394;Vt of a threshold voltage of the MOS transistors is applied to DC bias terminalof cascaded half-wave voltage doubler rectifier circuits (including MOS transistors Mto Mand capacitors Cto C) forming a bias circuit.

The present invention provides an amplifying circuit capable of accomplishing high-impedance input/output, and providing a high gain and low power consumption. The amplifier amplifies a signal received through an input terminal, and outputs the signal through an output terminal. A control circuit comprised of the inductors, and the switches turns input/output impedances of the amplifier into a high impedance.

Amplifying circuit

A PLL circuit comprises a phase comparator for comparing phases between a reference signal and an internal signal and outputting a phase difference signal according to a phase difference therebetween, a voltage controlled oscillator group composed of a plurality of oscillators which have mutually different frequency variable ranges and whose oscillation frequencies are respectively controlled in accordance with a phase control signal, a selecting means for selecting one of the outputs from the plurality of oscillators based on the phase difference signal or the phase control signal, and a frequency divider for generating the internal signal by dividing an output of an oscillator selected by the selecting means, and when the oscillator selecting state is changed, an output phase of the frequency divider is approximated to the phase of the reference signal. Thereby, a required voltage controlled oscillator can be selected in a short time according to a desirable oscillation frequency.

Growing community of inventors

Tokyo, Japan

Tadashi Maeda