Shinko Electric Industries Co., Ltd.

Tadashi Kodaira

Jyunichi Nakamura

Shunichiro Matsumoto

Takeshi Chino

Hironari Aratani

Takanori Tabuchi

Hideki Yonekura

Tadashi Arai

Kei Imafuji

Yoshikazu Hirabayashi

Kazuhiko Ooi

Eisaku Watari

Hidetoshi Arai

Masao Nakazawa

Masaru Yamazaki

Kiyotaka Shimada

Masaki Sanada

Sachiko Oda

Miwa Abe

Kinji Nagata

Kenjiro Enoki

A wiring substrate includes a first substrate and a second substrate stacked on the first substrate. The first substrate includes a first adhesive layer and conductive paste. The first adhesive layer is on a surface of a first insulating layer. The conductive paste is in an opening in the first adhesive layer. The second substrate includes a second adhesive layer and a protruding electrode. The second adhesive layer is on a surface of a second insulating layer facing toward the first substrate, and is bonded to the first adhesive layer. The protruding electrode has an end uncovered by the second adhesive layer, and is electrically connected to the conductive paste.

Wiring substrate

A semiconductor device includes a wiring substrate, a semiconductor chip, conductive paste, and an adhesive layer. The wiring substrate includes an insulating layer and a wiring layer on a surface of the insulating layer. The semiconductor chip includes a circuit-formation surface in which an electrode pad is provided, and is mounted on the wiring substrate with the circuit-formation surface facing toward the wiring layer. The conductive paste electrically connects the wiring layer and the electrode pad. The adhesive layer is over the entirety of the surface of the insulating layer, and covers the wiring layer and the conductive paste. The adhesive layer fills in a gap between the surface of the insulating layer and the circuit-formation surface, to bond the wiring substrate and the semiconductor chip. The adhesive layer extends onto a side surface of the semiconductor chip to form a fillet.

Semiconductor device

An optoelectric composite substrate of the present invention includes an insulating film, an optical waveguide embedded in the insulating film in a state that an upper surface is exposed from the insulating film, a via hole formed to pass through the insulating film, a conductor formed in the via hole, and a connection terminal on which an optical device is mounted and which is connected to an upper end side of the conductor, wherein the connection terminal is embedded in an upper-side portion of the via hole or is projected from the insulating film.

Optoelectric composite substrate and method of manufacturing the same

A solder bump forming method of carrying out a reflow treatment over a conductive ball mounted on a plurality of pads, thereby forming a solder bump, includes a metal film forming step of forming a metal film capable of chemically reacting to a tackifying compound on the pads, an organic sticking layer forming step of causing a solution containing the tackifying compound to chemically react to the metal film, thereby forming an organic sticking layer on the metal film, and a conductive ball mounting step of supplying the conductive ball on the pads having the organic sticking layer formed thereon, thereby mounting the conductive ball on the pads through the metal film.

Solder bump forming method

To prevent or alleviate the occurrence of stress in the junction portion between the semiconductor element and the semiconductor package for mounting the semiconductor element, so that cracks will not occur even when there is mounted a semiconductor element having a low strength. A package for semiconductor devices is formed as a laminate of many layers including a plurality of conducting layers and insulating resin layers that are alternately laminated one upon the other and having, on one surface of the laminate, a portion for mounting a semiconductor element. The whole region or some region(s) of the insulating resin layers of the laminate, including at least the portion for mounting the semiconductor element and the peripheries thereof, are constituted by a prepreg obtained by impregnating a woven fabric of a liquid crystal polymer with an insulating resin.

Package for semiconductor devices

To prevent the occurrence of stress in the junction portion between the semiconductor element and the semiconductor package mounting the semiconductor element, so that cracks will not occur even when there is mounted a semiconductor element having a small strength. A package for semiconductor devices is formed as a laminate () of many layers including a plurality of conducting layers and insulating resin layers that are alternately laminated one upon other and having, on one surface of the laminate, a portion for mounting a semiconductor element. The whole regions or some regions of the insulating resin layers (to) of the laminate, including at least the portion for mounting the semiconductor element and the peripheries thereof, are constituted by a prepreg obtained by impregnating a woven fabric of a liquid crystal polymer with an insulating resin.

A multilayered substrate for a semiconductor device, which has a multilayered substrate body formed of a plurality sets of a conductor layer and an insulation layer, and having a face for mounting a semiconductor element thereon and another face for external connection terminals, the face for mounting a semiconductor device being provided with pads through which the substrate is connected to a semiconductor element to be mounted thereon, and the face for external connection terminals being provided with pads through which the substrate is connected to an external electrical circuit, wherein a reinforcing sheet is respectively joined to the face for mounting a semiconductor element thereon and the face for external connection terminals of the multilayered substrate body.

Multilayered substrate for semiconductor device

A wiring substrate with bumps protruding from a surface of the substrate covers one side of a metallic base with an electrical insulating film thereon, having open holes exposing the base, etching the base through the open holes to form concavities in the base, electroplating the interior faces of the concavities to form a barrier metal film thereon filling the concavities with a bump material by electroplating, and forming a barrler layer on the bump material in each concavity. A stack of wiring patterns is formed on the insulating film, adjacent wiring patterns being separated by a respective intervening insulating layer and being electrically connected to each other through vias in the intervening insulating layer, and to the bump material filled in the concavities. Thereafter, the base and barrier metal film are removed.

Method for producing wiring substrate

The invention relates a method for producing a multilayer circuit board () for a semiconductor device, comprising using a composite metal sheet () in which two metal sheets are combined, forming, on each side of the composite metal sheet, pads for connecting to a semiconductor element, the pads being made of a metal material which is substantially not etched by an etchant for the metal sheet, and an insulating layer having openings exposing the pads, forming, on the insulating layer, a wiring line layer () connected to the pads and having pads for connecting to another wiring line layer to be subsequently formed, subsequently fabricating a multilayer circuit board body () by necessary numbers of insulating layers and wiring line layers alternately formed, forming, on the outermost insulating layer of the multilayer circuit board body, an insulating layer provided with through-holes exposing pads for external connecting terminals, which are located on the outermost insulating layer, then dividing the composite metal sheet, to yield intermediates () each provided on one side of the metal sheet with the multilayer circuit board body, and etching the metal sheet at an area at which a semiconductor element is to be mounted to remove the material of the metal sheet at that area, to thereby form a frame () surrounding the area for the mounting of the semiconductor element.

Growing community of inventors

Nagano, Japan

Tadashi Kodaira