Fujitsu Corporation

Tadashi Hoshino

Naoki Aihara

Shuji Yoshimura

Hichiro Hayami

Satoshi Kakuma

Masami Murayama

Shiro Uriu

Tomoyuki Yamaguchi

Naoki Fukuda

Takashi Tabu

The first input route information with a virtual path identifier, a virtual channel identifier and a line identifier set in the header of an input cell is compressed, and a base address with a lower number of bits than the input route information is generated from a part of the second input route information selected by the compression using a first conversion table. Then, third data consisting of both the base address and a part of the second input route information other than the part of the second input route information selected by the compression are generated, and the third data are converted to a routing tag using a second conversion table.

Multiline-correspondent cell header conversion apparatus and method

In a method of executing OAM processing in a plural-line terminating apparatus, a physical layer terminator converts a line signal to cells and adds a line identifier onto each cell header, the identifier specifying the line on which the cell arrived. A header converter converts a line-identifier/VPI/VCI of each cell to an identifier ICID for internal processing. An OAM processor unitarily manages data, which is necessary for OAM processing of each line, by a connection management table using the internal-processing identifier as an address, reads data from the management table based upon the ICID of the cells received from each of the lines, and executes OAM processing conforming to each line using the data that has been read.

Plural-line terminating apparatus and OAM processing method thereof

An identifier translation apparatus is provided that does not require a prohibitively large memory capacity and that is simple in construction and capable of increasing the speed of processing. Using an address consisting of a VPI and the high-order 6 bits of a VCI, a first-stage table is read to retrieve a block number, and using an address consisting of the retrieved block number and the low-order 6 bits of the VCI, a second-stage table is read to retrieve a routing tag. The routing tag is then appended to a cell.

Identifier translation apparatus

In a data access device for writing into or read from a data conversion table on the basis of a clock signal extracted from a cell being transferred over a line, a clock signal generator of the invention generates a second clock signal which differs from the first clock signal extracted from an incoming cell. A write/read control unit writes data into or reads data for maintenance from the data conversion table on the basis of either the first clock signal or the second clock signal when the line is normal. In the event of the occurrence of a failure in the line, on the other hand, the write/read control circuit permits the data conversion table to be written into or read from for maintenance on the basis of the second clock signal.

Virtual channel converter and VCC table access method

A police system of ATM exchange comprises an ATM exchange for exchanging the ATM cells, and an input cell speed limiting unit disposed in an input side of the ATM exchange and having a plurality of elastic buffers with a read speed equivalent to a band designated to each of a plurality of subscribers accommodated in the exchange, the elastic buffers being in accordance with the subscribers, the input cell speed limiting unit being arranged to limit the speeds of cells which are transmitted from each of the subscribers to the exchange to the band designated to each of the subscriber. The ATM exchange can completely manage and restrict the band of a line. Even if a congestion state takes place instantaneously due to an excessive cell flow, it does not affect calls which are in compliance with a predetermined band.

Police system of ATM exchange

It is determined whether or not a passing cell is a cell to be measured. If yes, a signal synchronous with the passing cycle of the cell is generated by a synchronous signal generator. The synchronous signal is digitally processed by a digital signal processor. Thus, each parameter related to the number of passing cells is obtained by converting the analysis based on the time axis to the area analysis based on the frequency axis.

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Kanagawa, Japan

Tadashi Hoshino