Mitsubishi Denki Kabushiki Kaisha

Tadashi Hirao

Kakutaro Suda

Shigeto Maekawa

Hisao Yakushiji

Kiyoshi Sakaue

Saburo Ohsaki

A semiconductor integrated circuit device includes a bipolar transistor having a semiconductor layer which will have a collector region, a base region provided at the surface of the semiconductor layer, and an emitter region provided at the surface of the base region. The device includes a first silicon film for connecting an external base layer with a base electrode of the transistor, and a first silicide film produced on the surface of the first silicon film, and a second silicon film for connecting an emitter layer with an emitter electrode of the transistor and a second silicide film produced on the surface of the second silicon film.

Semiconductor integrated circuit device and a method of producing the

A semiconductor integrated circuit device includes: an active device, such as a bipolar transistor and a resistor formed of a first silicon layer formed on a thick insulating film on the semiconductor substrate. A metal silicide film is formed on the surface of said first silicon layer for connection between the first silicon layer and an interconnection layer. The interconnection layer has contact with a first and a second part of the metal silicide film formed on a opposited sides of an isulating film on first silicon layer. The part of the first silicon layer under the insulation film and between the first and second parts of the metal silicide film forms the resistor.

Semiconductor IC device with polysilicon resistor

A semiconductor integrated circuit device including a bipolar transistor having a semiconductor layer than will become a collector region, a base region provided at the surface of the semiconductor layer, and an emitter region provided at the surface of the base region. The device comprises: a first silicon film for connecting an external base layer and a base electrode of the transistor, and a first silicide film that is produced on the surface of the first silicon film; and a second silicon film for connecting an emitter layer and an emitter electrode of the transistor and a second silicide film that is produced on the surface of the second silicon film.

Method of making self aligned external and active base regions in I.C.

In a bipolar transistor according to the present invention, interposed between both of a polysilicon film (603) on an emitter layer (3) and a first metal silicide film (502) on the polysilicon film (603) and a second metal silicide film (501) on a base layer (52) is only an oxide insulation film (105) on the edge wall of the polysilicon film (603). In a method of manufacturing a bipolar transistor according to the present invention, a source (603) of first conductive type impurity and a source (6) of second conductive type impurity provided parallel to each other simultaneously diffuse the said impurities, whereby emitter and base layers can be formed substantially parallel to each other while the emitter layer is in contact with an isolation region.

Bipolar transistor integrated circuit and method of manufacturing the

A solid state image sensor including a photoelectric transducing diode (PD) formed on an n-type semiconductor substrate (1) and a MOS transistor (TRs). A signal photoelectrically transduced by the diode (PD) is amplified by a pnp-type transistor (TRa) formed on the substrate and between the diode (PD) and the MOS transistor (TRa). The amplified signal is read out by the MOS transistor. The source (4) of the MOS transistor is connected to the emitter (21) of the pnp-type transistor partly by a polysilicon (91).

Method of fabricating a solid state image sensing device

A method of producing a semiconductor integrated circuit device in which a bipolar element and a MOS element are produced on a same chip, which includes forming an oxide film on the epitaxial regions of the device; depositing a silicon film on the device over epitaxial regions and forming a base electrode leading region using said silicon; and forming a base leading layer by diffusion from said base electrode leading region to reduce the distance between a collector leading region and the base electrode leading region, thereby enhancing the characteristics of the bipolar element.

Method of producing a semiconductor integrated circuit BI-MOS device

A method of manufacturing a semiconductor device in which in order to lead out directly a base electrode (9) from an active base layer (62) through a double layer comprising a first silicon film (601) and a metal silicide film (502), a part of an emitter electrode is formed of a second silicon film (602) and a hole for a contact is provided for forming the metal silicide film (502) for the active base layer (62) utilizing the second silicon film (602) as a mask.

Method of manufacturing bipolar transistor

According to the present invention, a method for forming a metal silicide electrode in contact with a doped region of a silicon substrate through a contact hole which is opened through an insulator film over said substrate, comprises the steps of: covering not only the contact hole area but also the insulator film with a metal film; injecting silicon ions into a predetermined area of the metal film covering the insulator portion adjacent the contact hole area; forming a continuous metal siliside film by annealing only on both the hole area and the ion-injected area; removing the metal film to leave the metal silicide film as an electrode which extends laterally to cover the hole area and the adjacent insulator portion. According to another aspect of the present invention, silicon ions are implanted into the area of the indulating film adjacent the contact hole area prior to a conformal deposition of metal. An annealing hep is carried out to form silicide. Unreacted metal is then removed to leave a metal silicide electrode extending laterally to cover both the hole area and the adjacent area of the insulator film.

Method for forming silicide electrode in semiconductor device

A method for manufacturing semiconductor device with improved frequency characteristics is provided. The base resistance and the base-to-collector capacitance are reduced by minimizing a base area and a space between an emitter and the base. The minimization of the base area is brought about by forming the emitter region in the base region by self-aligned process. The minimization of the space between the emitter and the base is accomplished by presenting only an insulator layer between a silicon layer on the emitter region and a metal wiring on the base region.

Method of making a self-aligned bipolar using differential oxidation and

Disclosed herein is a semiconductor device manufacturing process applicable to a bipolar semiconductor integrated circuit device in which a base electrode (9) is directly extracted from an active base region (61) through a superposed layer of a polysilicon film (601) and a metal silicide film (501) while an emitter electrode (10) is partially formed by a polysilicon film (602) and a contact hole is defined to form a base metal silicide film with the polysilicon film being employed as a mask. Consequently, the distance between an emitter layer (71) and a base electrode hole (50) is reduced without necessity of including margins of emitter and base electrode wires extending over respective holes in the said distance.

Method of making a bipolar transistor with polycrystalline contacts

In a method for fabricating a bipolar transistor in accordance with the present invention, a base electrode (9a) of metal silicide is formed being separated from an emitter region (7) only by the thickness of a double-layered insulator film (109, 203).

Method for fabricating bipolar transistor in integrated circuit

A method for fabricating bipolar transistors comprises a step of forming a multi-layered film consisting of a polysilicon film (600), a silicon nitride film (202) and a silicon oxide film (104) on an emitter region (7) and on an external base region (54, 56), a step of causing the silicon oxide film (104) to recede inwardly from the polysilicon film (600) and silicon nitride (202) film, a step of patterning the polysilicon film (600) by using the inwardly receded oxide film (104) as a mask while defining the external base region (54, 56), a step of forming an emitter region (7) and an active base region (6) by using the patterned polysilicon as an impurity diffusion source while self-alignedly forming an external base region (54, 56), and a step of self-alignedly forming an insulation film (107, 203) for electrical isolation between base and emitter electrode interconnections (9) on the side wall of the polysilicon film (603) by means of anisotropic etching.

Method for fabricating a bipolar semiconductor device by undercutting

Disclosed herein is a semiconductor device applicable to a bipolar semiconductor integrated circuit device in which a base electrode (9) is directly extracted from an active base region (61) through a superposed layer of a polysilicon film (601) and a metal silicide film (501) while an emitter electrode (10) is partially formed by a polysilicon film (602) and a contact hole is defined to form a base metal silicide film with the polysilicon film being employed as a mask. Consequently, the distance between an emitter layer (71) and a base electrode hole (50) is reduced without necessity of including margins of emitter and base electrode wires extending over respective holes in the said distance.

Semiconductor device

A solid state image sensor including a photoelectric transducing diode (PD) formed on an n-type semiconductor substrate (1) and a MOS transistor (TRs). A signal photoelectrically transduced by the diode (PD) is amplified by a pnp-type transistor (TRa) formed on the substrate and between the diode (PD) and the MOS transistor (TRa). The amplified signal is read out by the MOS transistor. The source (41) of the MOS transistor is connected to the emitter (21) of the pnp-type transistor partly by a polysilicon (91).

Solid state image sensing device

The inventive method of manufacturing a semiconductor device is carried out by slicing a silicon single crystal grown by a Czochralski method, thereby to provide a wafer (1), annealing the wafer (1) at a temperature range of 600.degree. C. to 800.degree. C. in an atmosphere including an inert gas and a small amount of oxygen for approximately 2 to 6 hours, thereby to precipitate oxygen (2) in the whole wafer (1), and then annealing the wafer (1) in the temperature range of 1000.degree. C. to 1100.degree. C. in a water vapor atmosphere including chlorine, thereby to form an oxide film (3) on the surface of the wafer (1), whereby a denuded zone (4) is formed beneath the oxide film (3) while crystal defects (5a-5d, 6) serving as a getter of impurities such as metals are formed beneath the denuded zone. In accordance with the inventive method, a denuded zone (4) having a controlled thickness can be formed in the wafer (1) without being influenced by the initial crystal defects and the oxygen concentration of the wafer.

Growing community of inventors

Itami, Japan

Tadashi Hirao