Nippon Telegraph and Telephone Corporation

Other

Sharp Kabushiki Kaisha Corporation

Tadao Takeda

Hiroshi Ban

Kazuhiro Yaegawa

Masaaki Tanno

Akihiko Nakano

Toshinori Ohmi

Eiji Yanagawa

Hideyuki Unno

Hiroki Suto

Hironori Matsumoto

Ryuichi Ogawa

Masaki Wakabayashi

Shinji Nakamura

Toshiaki Tsuchiya

Masahiro Yoshizawa

Nobuhiro Shimoyama

Sadao Nakashima

Haruhiko Shigemasa

Terukazu Ohno

Tsugumichi Shibata

Tetsushi Sakai

Yuichi Kado

Hiroki Sutou

Takemi Ueki

Tomota Ieyasu

Toshinori Fukunaga

Susumu Kurioka

Kenji Ohno

A 1-chip microcomputer of the present invention has (a) a monitor flag for setting a flag indicating that a specified address space is accessed, (b) an access permission address range setting register, for setting an address range in which an access is permitted while the flag is set, (c) an access permission area detection circuit for judging whether the access is made within the address range thus set, (d) an access permission setting register, for setting whether or not an access with respect to an address other than the address range should be permitted, and (e) memory read-out control circuit and memory writing control circuit for controlling an access with respect to a nonvolatile memory based on a result thus judged and content set by the access permission setting register. With the arrangement, it is possible to provide a 1-chip microcomputer that maintains the security among application programs.

1-chip microcomputer having controlled access to a memory and IC card using the 1-chip microcomputer

When a built-in nonvolatile memory in a microcomputer is tested, a control program prestored in a boot ROM is run upon entering a test command from an external communication device; a test program is transferred from the external communication device to a built-in RAM through a communication circuit; a control of a CPU is switched to the built-in RAM after the test program has been transferred and a test is conducted on the nonvolatile memory; and a test result and a fail log are transferred to the external communication device through the communication circuit. Consequently, the built-in nonvolatile memory in the microcomputer can be checked without leaving the test program on the chip.

Microcomputer having built-in nonvolatile memory and check system thereof and IC card packing microcomputer having built-in nonvolatile memory and check system thereof

In order to provide a built-in self testing function, a one-chip microcomputer is equipped with an activation register for activating the test operation and a built-in self test activation pattern generator for setting initial values at test control circuits (pseudo random number generator, logical circuit testing compressor, pattern generator, and memory testing compressor). In accordance with an instruction from the CPU, a built-in self test is activated so that the results of tests of the memory and the group of logical circuits are read from the memory testing compressor and the logical circuit testing compressor, and respectively compared with expected values preliminarily stored in the memory in the one-chip microcomputer; thus, the results are diagnosed. Thus, it is possible to carry out a built-in self test without using a plurality of exclusively-used test terminals.

One-chip microcomputer and control method thereof as well as an IC card having such a one-chip microcomputer

In the present semiconductor device, a chip with an LSI circuit is secured to a board (with the chip flipped) so as to be level. The LSI circuit on the chip is specified to operate normally only when the chip is level. Further, the back of the chip is processed so as to give stress to the chip. The chip has a reduced thickness of 50 &mgr;m or less (alternatively 30 &mgr;m to 50 &mgr;m). Therefore, when the chip is detached from the board, it deforms and is no longer level due to the stress, which prohibits the LSI circuit from operating normally. This way, the present semiconductor device ensures that no analysis can be conducted on the LSI circuit once the chip is detached.

Semiconductor device and method of manufacturing the same

A 1-chip microcomputer having a built-in nonvolatile memory includes at least one erasable flash memory provided in a memory space of the microcomputer, a boot ROM for storing an initial program to start up the 1-chip microcomputer and a transfer program to transfer the initial program to the flash memory, and control means for, when the flash memory stores no program, transferring the initial program to the flash memory in accordance with the transfer program and subsequently removing the boot ROM from the memory space. Consequently, even if a new program is additionally stored to the nonvolatile memory in the 1-chip microcomputer, the additional program can be carried out.

Microcomputer having built-in nonvolatile memory for simultaneous use as a program area and a data area

A semiconductor device includes, on a protective film laminated on a circuit principal part, (i) a light blocking film provided so as to cover the circuit principal part, (ii) an aluminum oxide film provided so as to completely cover the light blocking film, and (iii) a light-blocking upper wiring provided on the aluminum oxide film. An attempt to exfoliate the light blocking film or the light blocking upper wiring causes the resistance-detection-use upper wiring to break or thin, thereby resulting in an increase in the resistance of the resistance-detection-use wiring. The increase in the resistance is detected by the resistance detecting circuit part, and malfunction or inoperativeness of the circuit principal part is caused in response of detection. By so doing, the circuit principal part can be protected from analysis.

Semiconductor device wherein detection of removal of wiring triggers impairing of normal operation of internal circuit

A semiconductor device in accordance with the present invention includes a semiconductor element chip pressed and secured on a distortion die-pad so that the semiconductor element chip, sealed inside a package, is held in a predetermined distorted state. The predetermined distorted state is preferably downward or upward warping. The semiconductor element chip operates normally in the distorted state, and does not operate normally when the semiconductor element chip is separated from the semiconductor device, and thereby released from the distortion and laid alone. This ensures that the semiconductor element chip is protected from circuit analysis.

A noncontact type IC card includes an electromagnetic induction coil, integrated circuit, and switch. The electromagnetic induction coil receives the energy of an electromagnetic field radiated from an external device. The integrated circuit can be operated by driving power supplied by the energy of the electromagnetic field. The switch is provided on the electromagnetic induction coil for receiving the energy of the electromagnetic field and switches the inductance of the electromagnetic induction coil.

Noncontact type IC card and system therefor

A semiconductor chip has a nonvolatile memory formed on the upper surface side of a semiconductor substrate. The chip includes at least one recess portion formed in the lower surface of the semiconductor substrate. The recess portion is located in a region corresponding to the nonvolatile memory. A method of manufacturing the semiconductor chip is also disclosed.

Semiconductor chip and method of manufacturing the same

A method of manufacturing an SOI substrate uses an SOI substrate having a first single-crystal silicon layer, an insulating layer formed on the first single-crystal silicon layer, and a second single-crystal silicon layer formed on the insulating layer. The surface of the second single-crystal silicon layer is thermally oxidized. The second single-crystal silicon layer is controlled to have a predetermined thickness by removing the thermally oxidized surface. This step controlling the second single-crystal silicon layer to have a predetermined thickness includes the step of eliminating, by annealing, a stacking fault formed by the thermal oxidation.

Method of manufacturing SOI substrate

Growing community of inventors

Ebina, Japan

Tadao Takeda