Hitachi, Ltd.

Hitachi Ulsi Engineering Corp.

Hitachi Computer Engineering Co., Ltd.

Hitachi Tohbu Semiconductor, Ltd.

Hitachi Hokkai Semiconductor Ltd.

Tadao Kaji

Tsuneaki Kamei

Masaki Yoshinaga

Noriaki Hatanaka

Yuji Nagaya

Tsuyoshi Hirose

Keiji Miyamoto

Kiyoshi Inoue

Takashi Hashimoto

Hirotaka Nishizawa

Toshio Sugano

Toshio Yamada

Yoshio Homma

Michio Suzuki

Masamichi Ishihara

Hidetoshi Iwai

Kiichi Yamashita

Yasunori Yamaguchi

Ichiro Imaizumi

Masahiro Yamamura

Jiro Sawada

Seiichiro Tsukui

Akio Hayasaka

Keijiro Uehara

Osamu Yumoto

Takashi Araki

Shinobu Takeura

Junichi Nakagawa

Noboru Shiozawa

Tomoaki Hirai

Norihiko Kasai

Ichirou Anjou

Tetsuji Kohara

Sadao Morita

Tomoyoshi Miura

Mutsuo Tsukuda

Takeki Katsube

Yoshio Hom-Ma

Yuji Soga

Masakatsu Goto

Yoshiaki Anata

Yasushi Sekine

Semiconductor integrated circuit device, and process and apparatus for

A write driver for writing write data to a magnetic disk. The write driver is provided with first and second pnp type input transistors whose bases are each supplied with a pair of complementary input signals, and first and second npn type output transistor in the form of an inverted Darlington arrangement. A first resistor element is provided between the emitter of a corresponding pnp type input transistor and the collector of a npn type output transistor, whereas a second resistor element is provided between the common collector of the first and second npn type output transistors and supply voltage. The collectors of the first and second pnp type transistor are supplied with clamp voltage. Third and fourth npn type output transistors each connected to the first and second npn type output transistors in series and subjected to complementary switching control are provided to form a bridge circuit and to drive an inductive head.

Write driver circuit

A magnetic head circuit for a plurality of magnetic heads includes two emitter follower transistors for receiving magnetic head writing data, two differential transistors connected to the two emitter follower transistors for performing differential operation control thereover, and two resistors connected to collectors of the two differential transistors for supplying a base current to the two emitter follower transistors, and wherein the emitter follower transistors are connected in series with each other to perform differential switch operations over a magnetic head writing current. A magnetic head fly-back voltage has a clamp voltage which varies according to a writing current flowing through a pair of signal terminals. A pair of differential transistors, whose bases are connected to the pair of signal terminals and whose emitters are connected directly to each other, are operated according to a voltage appearing between the pair of signal terminals. Connected to the collectors of the pair of differential transistors are amplification transistors respectively. Connected to outputs of the amplification transistors are post-amplifiers. Such a connection configuration provides a small mirror capacitance as viewed from the bases of the amplification transistors. A high writing and reading accessing speed to the magnetic heads can be realized.

Magnetic head circuit having a write current changeover circuit with a

In utilizing frequency dividers at high frequencies the maximum operating frequency is determined by the delay time through the frequency divider. To minimize this delay time, a digital frequency divider is provided having a binary counter constructed of flip-flops and a shift register coupled to the output of said counter, wherein the output state of the shift register is forcibly reduced to a low level in response to a control signal for varying the number of frequency division of said counter. A circuit is also provided for feeding the input terminal of the flip-flop at the first stage of said counter with an OR output made up of the outputs of said shift register and said counter. Thus, the digital frequency divider can operate at a speed which is limited only by the toggle frequency of said flip-flop circuits.

Frequency divider

An improved method for forming an isolation region of electrical insulator between elements of a semiconductor device, comprising depositing an electrical insulator at a low temperature to cover one major surface of a semiconductor substrate and to fill a groove provided in this surface of the semiconductor substrate, coating the electrical insulator layer with another electrical insulator which is etched at a rate approximately equivalent to that of the former electrical insulator, so as to make the entire top surface of the electrical insulator layer parallel to the major surface of the substrate, and then applying physical etching using ions to remove the electrical insulator layers until the surface of the substrate is exposed, whereby to provide in the groove an isolation region having a satisfactory surface flatness.

Method of fabricating semiconductor device

A method for manufacturing a semiconductor device wherein semiconductor material is selectively removed from a principal surface of a semiconductor substrate having at least one semiconductor layer formed thereon to provide a groove that extends through said layer and into the substrate and wherein the semiconductor material of the substrate is selectively oxidized to form an oxide insulator layer within the groove. The groove has a width which is smaller than the thickness of the semiconductor layer and the oxide insulator layer serves to isolate a portion of the semiconductor layer from adjacent portions of the substrate.

Selective oxidation method

An even surface of an SiO.sub.2 layer on an Si body, whose surface is uneven, is obtained by the steps of forming a photoresist layer of KTFR (Trade name of Eastman Kodak Chemical Company) on the uneven surface of the SiO.sub.2 layer so as to have a thickness sufficient cover the unevenness of the surface and etching the SiO.sub.2 layer with said KTFR layer by rf sputter etching so as to expose a predetermined surface of the SiO.sub.2 layer.

Fabricating semiconductor device utilizing a physical ion etching process

In the manufacture of a semiconductor device, when an epitaxially-grown layer is formed on a semiconductor substrate partially formed with an oxide, a polycrystalline layer is formed on the oxide; the polycrystalline part is used as an isolation region for elements to be formed in the epitaxially-grown layer. The oxide for growing the polycrystalline layer is buried and formed in the semiconductor substrate at a depth at which a breakdown voltage between the elements is attained, whereby the width of the isolation region can be made small, so as to increase the density of integration of the semiconductor device.

Method of manufacturing a semiconductor device utilizing

In a method of manufacturing a semiconductor device, wherein an element forming a region of one conductivity type isolated by an oxide layer is disposed on a semiconductor substrate of the opposite conductivity type, a ring-shaped high impurity concentration region of the opposite conductivity type is formed on a portion of the semiconductor substrate so as to surround the isolated region to thereby prevent the formation of a parasitic channel and to stabilize the surface potential of the substrate.

Method of manufacturing semiconductor device having oxide isolation

A lateral transistor or the like is made by the steps of forming a first insulating layer on a semiconductor substrate and providing a first hole in this insulating layer so as to expose a first surface portion of the substrate. An impurity of a first conductivity type is introduced through the hole and a second hole is formed in the insulating layer so as to expose a second surface portion of the substrate spaced apart from the first portion. Then, a second insulating layer of a material different from that of the first layer is formed on the first insulating layer and on the first and second surface portions of the substrate. Subsequently, third and fourth holes are formed in the second insulating layer within the confines of these holes to expose at least portions of the first and second surface portions of the substrate. Then, an impurity of a second conductivity type is introduced into the exposed first and second surface portions of the substrate through the third and fourth holes.

Method of fabricating semiconductor device using at least two sorts of

A method of forming at least two electrodes of a portion of a semiconductor device, the portion including one or more semiconductor regions and being covered with an insulating protective film, comprises the steps of providing a hole for the first electrode in the insulating protective film, forming the first electrode through the hole, rendering the surface of the first electrode insulative, providing a hole for the second electrode in the insulating protective film by employing the insulative surface of the first electrode as at least a part of a mask, and forming the second electrode through the second-mentioned hole, whereby the electrodes are situated in close proximity with the insulative surface of the first electrode interposed therebetween.

Method of forming closely spaced electrodes onto semiconductor device

Growing community of inventors

Kokubunji, Japan

Tadao Kaji