Sumitomo Mitsubishi Silicon Corporation

Sumitomo Metal Industries, Inc.

Sumco Corporation

Tadami Tanaka

Toshiaki Ono

Eiichi Asayama

Hideshi Nishikawa

Masataka Horai

Masataka Hourai

Kazuyuki Egashira

Wataru Sugimura

Shigeru Umeno

Yasuo Koike

Takayuki Kubo

Makoto Ito

Manabu Nishimoto

Masahiko Okui

Junji Horii

Shunji Kuragaki

Shingo Kizaki

When growing a silicon single crystal free of grown-in defects based on the CZ method, the crystal is pulled out at a critical pulling rate at which a ring-shaped OSF occurrence region vanishes in a center portion of the crystal by using a hot zone structure in which a temperature gradient Gc in a center portion of the crystal is equal to or greater than a temperature gradient Ge in a peripheral portion of the crystal, while supplying an inert gas including hydrogen to an interior of a pulling furnace. The critical pulling rate at which the ring-shaped OSF occurrence region vanishes in the center portion of the crystal is increased, and single crystals free of grown-in defects in which dislocation clusters and COPs can be grown by pulling at a pulling rate higher than that of the prior art.

Silicon wafer, SOI substrate, method for growing silicon single crystal, method for manufacturing silicon wafer, and method for manufacturing SOI substrate

A method for growing a silicon single crystal used for semiconductor integrated circuit devices, wherein the single crystal is grown by the CZ method at a nitrogen concentration of 1&#xd7;10atoms/cm&#x2013;1&#xd7;10atoms/cmwith a cooling rate of not less than 2.5&#xb0; C./min at a crystal temperature of 1150&#xb0; C.&#x2013;1000&#xb0; C., in which case, the pulling rate is adjusted such that the outside diameter of a circular region including oxidation-induced stacking faults generated at the center of a wafer which is subjected to the oxidation heat treatment at high temperature is not more than &#x2157; of the wafer diameter, wherein the wafer is prepared by slicing the grown single crystal. In the growth method, the concentration of oxygen in the silicon single crystal is preferably not more than 9&#xd7;10atoms/cm(ASTM '79). With this method, the silicon single crystal, in which the generation of Grown-in defects can be effectively suppressed, can be produced in a simple process without any increase in the production cost. Moreover, a specification of the oxygen concentration and the application of the outward diffusion treatment are capable of producing a wafer, which is optimally used for monitoring particles.

Method for growing silicon single crystal

A silicon wafer is doped with boron and germanium in a range that satisfies a relational expression defined by: &#x2212;0.8&#xd7;10&#x2266;4.64&#xd7;10&#xd7;[Ge]&#x2212;2.69&#xd7;10&#xd7;[B]&#x2266;1.5&#xd7;10. This can reduce the miss-fit dislocation which might be induced when an epitaxial layer is grown over the silicon wafer that has been added with boron in high concentration. It is to be noted that in the above relational expression, the [B] denotes a boron concentration, while the [Ge] denotes a germanium concentration and a concentration unit is indicated by atoms/cm.

Silicon wafer

Epitaxial wafers showing marked IG effects can be manufactured from silicon single crystals doped or not doped with nitrogen without requiring any additional heat treatment process step while reducing the density of epitaxial layer defects. According to the first manufacturing method, an epitaxial layer is allowed to grow on the surface of a wafer sliced from a single crystal produced by employing a cooling rate of not less than 7.3&deg; C./min in the temperature range of 1200-1050&deg; C. in the step of pulling up thereof. According to the second manufacturing method, an epitaxial layer is allowed to grow on the surface of a silicon wafer sliced from a silicon single crystal doped with 1&times;10 atoms/cm to 1&times;10 atoms/cm as produced by employing a cooling rate of not less than 2.7&deg; C./min in the temperature range of 1150-1020&deg; C. and then a cooling rate of not more than 1.2&deg; C./min in the temperature range of 1000-850&deg; C. in the step of pulling up thereof.

Method of manufacturing epitaxial wafer and method of producing single crystal as material therefor

The invention relates to a method of producing epitaxial wafers for the manufacture of high integration density devices capable of showing stable gettering effect. Specifically, it provides (1) a method of producing epitaxial wafers which comprises subjecting a silicon wafer sliced from a single crystal ingot grown by doping with not less than 1&times;10 atoms/cm of nitrogen to 15 minutes to 4 hours of heat treatment at a temperature not lower than 700&deg; C. but lower than 900&deg; C. and then to epitaxial growth treatment. It is desirable that the above single crystal ingot have an oxygen concentration of not less than 11&times;10 atoms/cm . Further, (2) the above heat treatment is desirably carried out prior to the step of mirror polishing of silicon wafers. Furthermore, (3) it is desirable that the pulling rate be not increased in starting tail formation as compared with the pulling rate of the body in growing the above single crystal ingot. By taking these means, it is possible to produce epitaxial wafers having an almost constant, high level of gettering effect irrespective of the site of wafer slicing from the single crystal ingot and, furthermore, suppress the occurrence of defects within the epitaxial layer.

Method of producing epitaxial wafers

A method of producing high-quality epitaxial wafers with scarce occurrence of epitaxial layer defects by allowing an epitaxial layer on wafers sliced from a nitrogen-doped silicon single crystal as well as a method of pulling up a silicon single crystal to serve as the raw material therefore is provided. More particularly, a method of pulling up a single crystal from a nitrogen-doped silicon material melt while allowing the single crystal to grow is provided which comprises employing a passing or residence time in the temperature range of 1150-1050&deg; C. of not less than 50 minutes and/or a passing or residence time in the temperature range of 1050-950&deg; C. of not more than 40 minutes in the step of pulling up of the single crystal. Further, a method of manufacturing epitaxial wafers is provided which comprises allowing an epitaxial layer on the surface of silicon wafers sliced from the single crystal pulled up by the method mentioned above.

Method of pulling up silicon single crystal and method of manufacturing epitaxial wafer

A method of producing a high-quality silicon single crystal of a large diameter and a long size in a good yield by controlling the positions where ring-like oxygen-induced stacking faults (R-OSF) occur in the crystal faces and minimizing grown-in defects such a dislocation clusters and infrared scattering bodies that are introduced in the pulling step. Wafers produced from the above-high-quality silicon single crystal contain little harmful defects that would deteriorate device characteristics and can be effectively adapted to larger scale integration and size reduction of the devices. Therefore, the method can be extensively utilized in the field of producing semiconductor silicon single crystals.

High-quality silicon single crystal and method of producing the same

A silicon single crystal wafer having good device characteristics can be manufactured according to the Czochralski method without formation of any dislocation cluster within a crystal surface. Where a silicon single crystal having an oxygen concentration of less than 8.5.times.10.sup.17 atoms/cm.sup.3 (ASTM F1188-88) is manufactured, a radius of a latent zone of oxidation induced stacking defects ring-likely-distributed in the crystal surface is made within a range of 70% to 0% of a crystal radius, and a value of V/G (mm.sup.2 /.degree. C..multidot.minute) is controlled at a predetermined critical value or over at radial positions except an outermost periphery of the crystal when a pulling rate is taken as V (mm/minute), and a crystalline temperature gradient along the pulling axis is taken as G (.degree. C./mm). On the other hand, when a silicon single crystal having an oxygen concentration of not less than 8.5.times.10.sup.17 atoms/cm.sup.3 (ASTM F1188-88) is manufactured, a pulling rate is further set at 1.0 mm/minute or over. In the method for manufacturing the silicon single crystal wafer, it is preferred to calculate the crystalline temperature gradient G along the pulling axis through heat transfer calculation, set the critical value of V/G at 0.20 mm.sup.2 /.degree. C..multidot.minute, and control the value of V/G at a value larger than the critical value.

Growing community of inventors

Tokyo, Japan

Tadami Tanaka