Canon Kabushiki Kaisha

Tadaaki Maeda

Atsushi Date

Noboru Yokoyama

Takafumi Fujiwara

Katsunori Kato

Masakazu Kitora

Keishi Inaba

Nobuaki Matsui

A printer has a controller configured to give an instruction to a LAN controller, the instruction specifying which one of communication speeds the LAN controller should communicate at. When it is determined that the mode of the printer is changed from a power mode in which power is supplied to the controller to a power mode in which power is not supplied to the controller, the controller instructs the LAN controller to reduce the communication speed. After the instruction to reduce the communication speed is given, a power supply unit cuts off power supply to the controller.

Communication apparatus

Raster image data is converted into block vector image data corresponding to blocks each having a predetermined size by segmenting the raster image data into the blocks with the predetermined size and executing vectorization processing. The input raster image data is converted into a block vector image. The converted block vector image is stored in a storage means. Transfer of the image data as a processing target in the apparatus is controlled to output the raster image data obtained by rasterizing the stored block vector image data.teh

Image processing apparatus, control method thereof, and storage medium storing a program for converting raster image data into block vector image format

A image forming apparatushas a network interfacefor receiving data transmitted from an external apparatus, and a control unitfor interpreting content of data received by the network interface. The image forming apparatusfurther has a printing unitfor executing print processing based upon print data if print data has been received by the network interface, and a restoration control unitfor exercising control so as to place the control unitin an active state or inactive state. The restoration control unitof the image forming apparatusstarts supplying a low-speed clock to the control unitin the inactive state in response to receipt of data by the network interface, and starts supplying a high-speed clock in response to an interpretation by the control unitthat the content of the data is print data.

Image forming apparatus and method of controlling same

When it is detected that the voltage of a main power supply is reduced below a predetermined value during a normal operation, a power controller switches a power supply for a DRAM from the main power supply to a battery power supply and makes an instruction signal for instruction a self-refresh mode to a memory controller active. In response to this, the memory controller changes a clock enable signal for the DRAM to a low level to establish the self-refresh mode of the DRAM, and, after, the self-refresh mode of the DRAM is established, supplying of power to the memory controller is stopped. The clock enable signal for the DRAM is maintained to the low level by pull-down resistance even when the supplying of power to the memory controller is stopped from a condition that the signal is changed to the low level in the self-refresh mode, thereby maintaining the self-refresh mode of the DRAM.

Memory control device having less power consumption for backup

In plural master apparatus connected to a bus, a master apparatus issues, to an arbiter, a request signal requesting the use of the bus after a lapse of a predetermined interval when the use of the bus becomes necessary, while another master apparatus issues, to the arbiter, a request signal requesting the use of the bus immediately when the use of the bus becomes necessary. The arbiter grants a right to use the bus by equally handling the request signals from the master apparatus. Also there is prepared a signal indicating a traffic in the bus, and the request signal is issued after the lapse of the interval in case of a high traffic but it is issued immediately in case of a low traffic. It is thus possible to adjust the practical priority of the but use right in detail or to dynamically change such priority by the presence or absence of such interval or a length thereof.

Method of arbitration for bus use request and system therefor

A P bus from a CPU, an MC bus from a system memory, an IO bus to which an input/output device has been connected, and a G bus for transferring image data of a scanner/printer controller are connected to a system bus bridge (SBB). The SBB connects any of the P bus, G bus and IO bus as a master and any of the MC bus and IO bus as a slave in dependence upon a request from a master. At this time the P bus and IO bus can be connected in parallel with the G bus and MC bus. As a result, access to the memory by the scanner/printer controller can be carried out in parallel with use of the input/output device by the CPU. This makes it possible to process a large quantity of data, such as image data, efficiently.

Bus management based on bus status

When power stoppage of a main power supply is detected during a normal operation, a power controller switches a power supply for a DRAM from the main power supply to a battery power supply and makes an instruction signal for instruction a self-refresh mode to a memory controller active. In response to this, the memory controller changes a clock enable signal for the DRAM to a low level to establish the self-refresh mode of the DRAM, and, after, the self-refresh mode of the DRAM is established, supplying of power to the memory controller is stopped. The clock enable signal for the DRAM is maintained to the low level by pull-down resistance even when the supplying of power to the memory controller is stopped from a condition that the signal is changed to the low level in the self-refresh mode, thereby maintaining the self-refresh mode of the DRAM.

Method of delaying bus request signals to arbitrate for bus use and system therefor

Bus control apparatus solves the problem that a high-speed bus which supports only burst transfer cannot be used when the boundary of a transfer memory address is not coincident with a unit boundary. A scanner controller and printer controller connected to a G bus capable of performing only burst transfer and a B bus capable of performing even single transfer determine from the address and data length of data to be transferred whether the data does not match the memory boundary. If the data does not match this boundary, a data portion which is not accommodated within the burst transfer unit is single-transferred using the B bus. A data portion which is accommodated within the burst transfer unit is burst-transferred using the G bus.

Bus control apparatus

A scanner is connected to a G bus and a B bus by way of a scanner controller and a G bus/B bus interface (GBI). A printer is connected in a similar manner. Furthermore, the scanner controller is connected directly to a printer controller with a CP bus. The GBI is capable of performing DMA transfer and data can be transferred between the GBIs. Furthermore, data can be transferred by way of the G bus and a RAM or the B bus and the RAM. The GBI is connected to the scanner controller and the printer controller by way of FIFOs, respectively. Accordingly, an image input/output control system according to the present invention is capable of absorbing differences in data transfer speeds and can be connected to various kinds of scanners and printers.

Image input/output control system

The control apparatus reads the value of an external switch, and checks whether the apparatus serves as a control side or subordinate side. If the control apparatus serves as a subordinate side, it waits until the control side writes a configuration through a bus. If the control apparatus serves as a control side, it sets necessary values in itself, and writes a configuration in a device on the bus. In this way, the control apparatus can operate as both the control side and subordinate side.

Growing community of inventors

Kawasaki, Japan

Tadaaki Maeda