Hitachi, Ltd.

Hitachi Engineering Co., Ltd.

Hitachi Haramachi Semi-conductor, Ltd.

Hitachi Engineering Ltd

Haramachi Semi-hitachi Ltd.

Hitachi Conductor Ltd.

Hitachi Ltd. and Hitachi Haramachi Semi-conductor Ltd.

Tadaaki Kariya

Tatsuo Shimura

Mitsuhiko Okutsu

Sigeo Tomita

Shigeru Sugayama

Koji Sasaki

Susumu Murakami

Shuroku Sakurada

Shinji Hiramitsu

Shosaku Ishihara

Satoshi Matsuyoshi

Hideyuki Yagi

Yoichi Nakashima

Masato Miura

Ryouichi Kajiwara

Masayoshi Sugiyama

Isao Kojima

Shigeyuki Kawahata

Eisuke Sato

Kazunori Morozumi

Kouji Kawamoto

Norihiro Kawauchi

Syuzoh Kaneko

Sinichi Kurita

Yasuhiro Mashiko

Kazuyoshi Masuda

Kenji Abe

A semiconductor device is provided, in which buffer layers having a coefficient of linear expansion of 3&#xd7;10&#x2212;6/&#xb0; C. to 8&#xd7;10&#x2212;6/&#xb0; C. are joined to upper and lower surfaces of a silicon chip through a Pb-free solder having a thickness of not more than 0.05 mm and a melting point of not less than 250&#xb0; C. The upper surface of the upper buffer layer and the lower surface of the lower buffer layer are respectively joined to a lead and a base through Pb-free solders having a thickness of not less than 0.15 mm and a melting point of not less than 250&#xb0; C.

Semiconductor device

A driving circuit suitable for driving a capacitive load such as an EL display panel is disclosed, which comprises a first power source terminal; a second power source terminal; an output terminal, with which a capacitive load is connected; a source side thyristor connected between the first power source terminal and the output terminal, and supplying current to the load; a sink side thyristor connected between the second power source terminal and the output terminal and drawing-out current from the load; and a control section connected between the first power source terminal and the second power source terminal and ON-OFF controlling the source side thyristor and the sink side thyristor through a circuit arrangement coupled between the control circuit and the gates of the thyristors.

Circuit for driving a capacitive load utilizing thyristors

A method of transmitting a pulse signal composed of a combination of a positive pulse and a negative pulse through a semiconductor switch providing a conduction modulation in the on-state, the positive pulse and negative pulse flowing through the semiconductor switch in the forward and reverse directions, respectively, relative to the semiconductor switch. An offset current is superposed upon the pulse signal so as to make the absolute value of the positive pulse larger than that of the negative pulse.

Method of transmitting pulse signal and apparatus therefor

A lateral-type semiconductor device is provided in which a p-emitter layer and a p-collector layer are formed on the exposed-surface side of an n-base layer. The exposed surfaces of the p-emitter layer and the n-base layer are substantially surrounded by the exposed surface of the p-collector layer. The n-base layer is connected to a base electrode or through a first heavily-doped region extending from under the n-base region to an exposed surface area on the outer-periphery side of the p-collector layer. In an alternative embodiment a second heavily-doped region for connecting the n-base layer and the first heavily-doped region can be provided.

Lateral-type semiconductor device

A capacitive load driving apparatus which has a plurality of first switching elements connected between a plurality of parallel loads and a first power source terminal for switching currents which charge the loads. There is furthermore provided a plurality of bipolar transistors connected between connecting points (of the first switching elements and the loads) and a second power source terminal for discharging charges stored in the loads and a plurality of second switching elements connected between a third power source terminal and bases of the bipolar transistor, respectively, for switching base currents supplied from the third power source terminal to the bipolar transistors. In addition, the capacitive load driving apparatus has a logic circuit connected to an input terminal for providing driving signals which turn off selectively one or all of the second switching elements in accordance with a signal from the input terminal, and it has a resistor connected between the third power source terminal and the second switching elements.

Capacitive load driving apparatus

A fraction of current passing through the P-emitter region and N-base region of a thyristor is by-passed to the base-emitter junction of a PNP transistor. The amount of the base current is dependent on the thyristor current. Thus, as the anode current of the thyristor increases, the base current and hence the collector current of the PNP transistor increases. The collector current by-passed to the PNP transistor is fed, via a switch which is closed during the off-time of the thyistor, to the base-collector path of an NPN transistor whose collector and emitter are respectively connected to the gate and cathode of the thyristor. The turn-on voltage across the collector and emitter of the NPN transistor accordingly becomes lower than the gate-cathode voltage of the thyristor. The base-emitter current of the NPN transistor equals the collector current of the PNP transistor, the collector current being a fraction of the anode current by-passed to the PNP transistor. A fraction of the anode current of the turned-on thyristor is utilized as the control power for driving the NPN transistor so that additional external power for turning off the thyristor becomes almost unnecessary.

Semiconductor switching circuit

A voltage across a resistor of a small value connected in series with the cathode or anode of a thyristor is used as a signal source for overcurrent detection. When an overcurrent is generated, the voltage across the resistor increases in excess of the built-in voltage between the base and emitter of a transistor, thereby turning on the transistor. A transistor to take out a current from the gate of the thyristor is turned on. Thus, the self-turn off operation of the thyristor is executed.

Semiconductor switch

A device for driving a capacitive load, comprising a first switching element responsive to an external control signal for selectively conducting a charge current therethrough to the load, a second switching element responsive to the external control signal for conducting a discharge current from the load and a generator for generating from the discharge current a cutoff signal to be applied to the first switching element to ensure turn-off of the latter.

Capacitive load driving device

In a bidirectional linear switch in which two MOS transistors are used with their sources mutually connected, the gates and the substrates of the transistors are also respectively mutually connected and a control signal is applied to the gates. A potential of the polarity such that the substrates are reversely biased to the sources is applied between the substrates and the sources. With this constitution, the linearity of the bidirectional switch is improved.

Bidirectional MOS linear switch

A reference voltage circuit in which an output reference voltage is stabilized against variations in power source as well as in transistor current amplification factor h.sub.FE. In a reference voltage circuit comprising a DC power source connected to an output terminal, first and second resistors with their respective one ends commonly connected to the output terminal, a first NPN transistor with its collector shorted with its base and connected to the other end of the first resistor and its emitter grounded, a second NPN transistor with its collector connected to the other end of the second resistor and its base connected to the collector of the first NPN transistor, a third resistor connected between the emitter of the second NPN transistor and the ground, and a third NPN transistor with its collector connected to the output terminal, its base connected to the collector of the second NPN transistor and its emitter grounded, there are further provided a fourth resistor connected between the collector of the third NPN transistor and the output terminal and a PNP transistor with its base connected to the collector of the third NPN transistor, its emitter connected to the output terminal and its collector grounded.

Reference voltage circuit

This invention concerns a so-called double-moat uni-surface type semiconductor device in which two concentric moats are provided in one main surface of the substrate and the edges of the two pn-junctions for blocking main circuit voltages applied to the device are exposed in the surfaces of the moats. Semiconductor layers having high impurity concentrations and serving as channel stoppers are formed on the semiconductor layers exposed in the one main surface of the substrate, contiguous to the moats and spaced apart from the pn-junctions, each high impurity concentration layer having the same conductivity type as the semiconductor layer on which it is formed. The moats are filled with surface passivating material.

Semiconductor device with double moat and double channel stoppers

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Ibaraki, Japan

Tadaaki Kariya