Samsung Electronics Co., Ltd.

Yonsei University

Hyundai Electronics Industries Co. Ltd.

Colorzip Media, Inc.

Tack-don Han

Seok-yoon Jung

Shin-Dug Kim

Jin-hong Park

Gi-ho Park

Jae-hyun Kim

Kyoung-woo Lee

Sang-oak Woo

Cheol-Ho Cheong

Woo-chan Park

Il-san Kim

Yong-je Kim

Kwon-taek Kwon

Jeong-soo Park

Shin-dug Kim

Hye-Jeong Nam

Suk Kyu Chang

Nam-Kyu Lee

Sung-Bong Yang

Jae-ho Nah

Gil-hwan Lee

Woo-nam Chung

Sang-duk Kim

Seong-Hun Jeong

Jae-Yun Kim

Jong-Young Kim

Han-Yeong Choi

Eui-Jae Kim

A rendering apparatus and method are provided. The rendering method includes: reading a block, corresponding to a fragment, from among compressed blocks stored in a depth buffer, by considering frequency information corresponding to the fragment and prepared in advance; and performing a depth test for the fragment by considering the restored block.

Method and apparatus for rendering

A rendering method, medium and apparatus for sequentially performing one or more third raster operations to test whether a fragment can be displayed as a pixel after sequentially performing one or more second raster operations to test whether the fragment can be displayed as the pixel, so as to provide efficient power consumption and rapid completion of rendering.

Rendering apparatus, method and medium

A bus arbitration system, medium, and method. The bus arbitration system can arbitrate access to a bus for a plurality of masters, requesting the use of a bus to which at least one slave is connected, and may include a bus use granting unit that outputs a plurality of bus grant signals for granting the use of the bus to the plurality of masters that request the use of the bus at the same time, a simultaneous processing available signal selecting unit that selects a predetermined number of operation instruction signals having a predetermined similarity, from among a plurality of operation instruction signals that are input from the masters, in response to the bus grant signals, and an operation instructing unit that simultaneously transmits the selected operation instruction signals to the slave through the bus.

Bus arbitration system, medium, and method

An effective structure of a pixel cache for use in a three-dimensional (3D) graphics accelerator is provided. The pixel cache includes a z-data storage unit that reads z-data from a frame memory and provides the read z-data to a pixel rasterization pipeline; and a color data storage unit that in advance reads and stores color data from the frame memory at the same time when the z-data storage unit reads the z-data from the frame memory, and provides the color data to the pixel rasterization pipeline only when the result of predetermined z-test is determined to be a success in the pixel rasterization pipeline. Accordingly, the pixel cache structure enables only color data required to be read and stored in advance before processing of the color data, thereby preventing access latency, increasing the efficiency of a color cache, and reducing power consumption.

Pixel cache, 3D graphics accelerator using the same, and method therefor

A cache memory system reduces the rate of cache misses. The cache memory system includes a first auxiliary storage device which stores first information blocks and a second auxiliary storage device which stores second information blocks fetched from a lower level memory device. Each second block includes a plurality of the first information blocks. A process for fetching information selectively fetches a first or second information block from the lower level memory device and selectively stores the fetched block in the first auxiliary storage device and/or the second auxiliary storage device. Selection of the size of block to fetch and where to store the fetched block is according to whether the data to be referenced by the central controller is in the first auxiliary storage device or the second auxiliary storage device and whether first information blocks that do not include the referenced data are both in the second information block including the referenced data and in the first auxiliary storage device. A control unit that controls the selective fetching and storing maintains state data that includes entries corresponding to second information blocks. Each entry identifies a corresponding second information block and indicates the number of first information blocks that are in the first auxiliary storage device and from the corresponding second information block.

Cache memory system and method for managing the same

A method of and a circuit for instruction/data prefetching using a non-referenced prefetch cache, adapted to store instruction/data blocks prefetched in accordance with a variety of existing prefetchinig machanisms, but not referenced by the central processing unit in an on-chip memory as the non-referenced prefetch cache without discarding them when they are replaced by new ones in a prefetch buffer so that a direct memory reference to the non-referenced prefetch instruction/data blocks can be achieved when they are to be referenced at later times, without any requirement of fetching or prefetching them from the lower memory again. Accordingly, it is possible to not only decrease the number of cache misses and the memory latency due to the fetching of instructions/data from the lower memory for the reference to the instructions/data, but also to reduce memory traffic.

Method of and circuit for instruction/data prefetching using non-referenced prefetch cache

A method for storing parity and rebuilding the data contents of two failed disks in an external storage subsystem comprises the steps of: proving a disk array defined as a matrix of (N-1).sup.* N including N disks each logically divided into N-1 data blocks where N is a prime number, the data blocks of a row being defined as a horizontal parity group, the data blocks existing in a rightwardly and upwardly continuous diagonal line being defined as a diagonal parity group; defining the data blocks existing in the diagonal line leftwardly and downwardly from the first data block of the (N-1) disk to the last data block of the first disk as horizontal parity blocks; defining the data blocks existing in the (N-1) row of the matrix as diagonal parity blocks; exclusive OR'ing (XORing) the contents of each of the horizontal and diagonal parity groups to obtain the parity value stored into the parity block of the corresponding horizontal or diagonal parity group; and analyzing a diagonal parity group including an error data block of the two failed disks to restore the error data block and then, the horizontal parity group including the restored error data block to restore another error data block, wherein the last analyzing step is repeated to completely rebuild the data contents of the two failed disks.

Method for storing parity and rebuilding data contents of failed disks

A disk drive constructed according to an exemplary embodiment of the present invention includes a disk having a plurality of tracks formed concentrically along a first surface of the disk for storing data. The tracks are divided into first and second data storage regions positioned between an innermost circumferential region and an outermost circumferential region of the disk. First and second heads write and read data to and from the first surface of the disk. The first head is positioned to access the first data storage region while the second head is positioned to access the second data storage region, and the first head being positioned to access the second data storage region while the second head is positioned to access the first data storage region. First and second arm assemblies are respectively connected to the first and second heads. The first arm assembly extends the first head over a first radius of the disk, and the second arm assembly extends the second head over a second radius of the disk. An actuator shifts the first and second heads among the tracks by driving the first and second arm assemblies. A control unit enables selection of the one of the first and second heads that is closer to a target position on the first surface of the disk so that the closer head can access the data at the target track.

Disk drive having double heads and method for controlling head switching

Growing community of inventors

Seoul, South Korea

Tack-don Han