Fujitsu Corporation

Tachio Yuasa

Osamu Kobayashi

Atsushi Matsuda

Kunihiko Gotoh

Hirokazu Okada

A resistor string digital-analog conversion circuit includes three resistor strings connected in series, a controller, and a switch group. The controller controls switchover of the switch group according to a signal of m high-order bits of an input digital signal. Thus an analog output corresponding to the m high-order bits is obtained. Another controller varies potentials of two variable voltage sources according to a signal of n low-order bits of the input digital signal, while always keeping a potential difference across the three resistor strings constant. Thus an analog output corresponding to the n low-order bits is obtained. This analog output is output to an output terminal.

Digital-analog conversion circuit capable of functioning at a low power supply voltage

A stabilized current mirror circuit including a current mirror circuit 10 having an input-stage nMOS transistor 11 and an output-stage nMOS transistor 12, an error amplifier 30 in which an output current I3 decreases in response to the rise of an output potential V2 of the output-stage nMOS transistor 12 above a specified value, a current mirror circuit 20 having an input-stage pMOS transistor 22 through which the current I3 flows and an output-stage pMOS transistor 21 connected in series to the output-stage nMOS transistor 12 and an nMOS transistor 42 connected between the output-stage pMOS transistor 21 and the output-stage nMOS transistor 12. An nMOS transistor 41 connected at a current input provides a bias voltage to the gate of the nMOS transistor 42 to enable the nMOS transistor 42 to function as a norator.

Stabilized current mirror circuit

A novel amplifier circuit having a wide output signal amplitude range and a small current consumption is disclosed. A signal conversion circuit converts the input signal thereof into a first current signal. A current calculation circuit calculates the difference between a predetermined current value and the first current signal. A current amplifier circuit amplifies the difference current. Since the difference current calculated by the current calculation circuit is amplified, the dynamic range of the output can be widened with a small current flowing in the signal conversion circuit and the current calculation circuit. Further, this amplifier circuit, if designed to supply no output current under no load, can reduce the current consumption since the only steady current that flows under that condition is the small one flowing in the signal conversion circuit and the current calculation circuit.

Amplifier circuit with wide dynamic range and low power consumption

An input signal is applied to a first input terminal of a differential amplifier through an input resistance, and a feedback signal is applied to the first input terminal through a feedback resistance. A reference potential is applied to a second input terminal of the differential amplifier. A capacitance element is connected between the second input terminal and a high potential power supply, and a capacitance element is connected between the second input terminal and a low potential power supply. The amplification ratio of an amplification circuit can be switched over multiple stages by switching the resistance values of the input resistance and the feedback resistance by semiconductor analog switches. When any fluctuation exists in a power supply voltage, the fluctuation component is applied to the first input terminal of the differential amplifier through the semiconductor analog switches and causes a fluctuation of the amplification ratio. This fluctuation component of the power supply voltage is applied to the second input terminal from the capacitance element connected to the second input terminal. Since the differential amplifier eliminates the in-phase component of the signal applied to the second input terminal, the influence of the fluctuation of the power supply voltage on the input signal can be restricted because the capacitance element is connected to the second input terminal.

Gain controlled amplification circuit having differential amplifier

An operational amplifier has a differential amplification section, an output section, a control signal generation unit, and a drive control unit. The output section has a first transistor of a first conductivity type and a second transistor of a second conductivity type that is opposite to the first conductivity type. The first and second transistors are connected in series between a first power source unit and a second power source unit, and the first transistor is driven according to an output of the differential amplification section. The control signal generation unit is used to detect a current flowing through the first transistor and generate a control signal in response to the detected current. The drive control unit is used to drive the second transistor in response to the control signal.

Operational amplifier having stable operations for a wide range of

A D/A converter includes an analog voltage generating circuit for generating an analog voltage, and an offset-controllable amplifier amplifying the analog voltage with a predetermined amplification factor and outputting an analog output signal. An offset voltage generating circuit generates an offset voltage which is varied on the basis of a digital input signal. The offset voltage controls an offset of the offset-controllable amplifier.

D/A converter including output buffer having a controllable offset

A D/A converter has a first partial circuit, and second and third partial circuits connected with said first partial circuit. The first partial circuit has a first row of K resistors of the same resistance value and groups of switches provided for the resistors, to select 'K-1' resistors among said K resistors and connect said selected resistors in series with said second and third partial circuits. The second partial circuit has a second row of L resistors, a first group of switches connected in series with said resistors, respectively, and a second group of switches connected in parallel with said series-connected second row of resistors and said first group of switches, respectively. The third partial circuit has a third row of L resistors, a third group of switches connected in series with said resistors, respectively, and a fourth group of switches connected in parallel with said series-connected third row of resistors and said third group of switches, respectively. Therefore, the D/A converter can reduces an occupied area thereof, and increases the number of D/A converter chips to be fabricated on a wafer, to thereby reduce the costs of the D/A converters.

Digital-to-analog converter for reducing occupied area thereof

A D/A converter includes a first resistor network including K resistors each having a resistance, where K is an integer, and a second resistor network including L resistors connected in series where L is an integer. The sum of resistances of the L resistors is approximately equal to the resistance of each of the K resistors. The D/A converter further includes a first switching part, coupled to the K resistors, for selecting (K-1) resistors among the K resistors in accordance with a digital input signal and for forming a series circuit including the (K-1) resistors and the second resistor network connected in series, first and second voltages being applied to respective ends of the series circuit. Furthermore, the D/A converter includes a second switching part, coupled to the second series circuit, for connecting one of the L resistors to an output terminal of the D/A converter.

Growing community of inventors

Kawasaki, Japan

Tachio Yuasa