United Microelectronics Corp.

Ta-chi Kuo

Ching-Hsiang Hsu

Nai Jen Yeh

Su Lu

Jyh-Kuang Lin

A metal oxide semiconductor field effect transistor power device with a lightly doped silicon substrate includes a source region and a drain region. At least one field implanted island region is formed along the surface of the substrate between the source and drain regions with a field oxide region formed above the field implanted region, a dielectric layer and a gate electrode formed over the substrate, and self-aligned source and drain regions implanted into the device with external electrodes connected thereto.

Low resistance, high breakdown voltage, power mosfet

A new method of forming an integrated circuit MNOS/MONOS device with suppressed off-cell leakage current is described. A silicon oxide layer is formed on the surface of a semiconductor substrate. A layer of silicon nitride is deposited over the silicon oxide layer and patterned. A first ion implantation is performed at a tilt angle to form channel stop regions in the semiconductor substrate not covered by the patterned silicon nitride layer wherein the channel stop regions partially extend underneath the patterned silicon nitride layer. The silicon substrate not covered by the patterned silicon nitride layer is oxidized to form field oxide regions within the silicon substrate wherein the channel stop regions extend under the full length of the field oxide regions. The patterned silicon nitride layer is removed. An insulating layer of silicon nitride/silicon oxide (NO) or silicon oxide/silicon nitride/silicon oxide (ONO) is deposited over the surface of the semiconductor substrate. A layer of polysilicon is deposited overlying the insulating layer and patterned. Source and drain regions are formed within the semiconductor substrate to complete the MNOS/MONOS device with constant threshold voltage in the fabrication of an integrated circuit.

Method of forming an MNOS/MONOS by employing large tilt angle ion

A metal oxide semiconductor field effect transistor power device with a lightly doped silicon substrate includes a source region and a drain region. At least one field implanted island region is formed along the surface of the oppositely substrate between the source and drain regions with a field oxide region formed above the field implanted region, a dielectric layer and a gate electrode of matching configurations formed over the substrate, and self-aligned source drain regions implanted into the device with external electrodes connected thereto.

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Hsin-Chu, Taiwan

Ta-chi Kuo