Nan Ya Technology Corporation

Vanguard International Semiconductor Corporation

Szu-Yao Chang

Chung-Lin Huang

Chih-Hung Chen

Chiang-Lin Shih

Cheng-Wei Chou

Cheng-Tao Chou

Yung-Fung Lin

Hsiu-Ming Chen

A semiconductor device structure and method for manufacturing the same are provided. The semiconductor device structure includes a first word line, a second word line, a gate dielectric structure, a channel layer, and a bit line. The first word line and second word line extend along a first direction. The gate dielectric structure is disposed on a first sidewall of the first word line and on a second sidewall of the second word line. The channel layer is disposed on a first sidewall of the gate dielectric structure. The bit line is disposed on the channel layer and extends along a second direction substantially perpendicular to the first direction. A first roughness of a first sidewall of the channel is different from a second roughness of a second sidewall of the channel layer.

Semiconductor device structure having a channel layer with different roughness

A semiconductor device structure and method for manufacturing the same are provided. The method includes: providing a substrate; forming a first word line and a second word line extending along a first direction; forming a dielectric material conformally on a first sidewall of the first word line and on a second sidewall of the second word line, wherein the second sidewall of the second word line faces the first sidewall of the first word line; forming a semiconductor material on a sidewall of the dielectric material; and patterning the dielectric material and the semiconductor material to form a gate dielectric structure and a channel layer between the first word line and the second word line.

Method of manufacturing semiconductor device structure having a channel layer with different roughness

A method of forming a semiconductor structure includes forming a capacitor on a substrate. A recess is formed in the capacitor. A drain region is formed in the recess. A word line is formed on the drain region. A gate structure is formed on the drain region, and the gate structure is electrically connected to the word line. A first bit line is formed on the gate structure, such that the first bit line servers as a source region.

Method of forming a semiconductor structure having a gate structure electrically connected to a word line

The present application discloses a method for fabricating a semiconductor device with a protruding contact. The method includes providing a substrate; forming a bit line structure on the substrate; forming a capacitor contact structure next to the bit line structure; recessing a top surface of the bit line structure; and forming a landing pad layer covering a portion of a top surface of the capacitor contact structure and an upper portion of a sidewall of the capacitor contact structure.

Method for fabricating semiconductor device with protruding contact

The present application discloses a semiconductor device with a protruding contact and a method for fabricating the semiconductor device with the protruding contact. The semiconductor device includes a substrate, a capacitor contact structure protruding from the substrate, and a landing pad layer covering a portion of a top surface of the capacitor contact structure and an upper portion of a sidewall of the capacitor contact structure.

Semiconductor device with protruding contact and method for fabricating the same

A semiconductor structure includes a substrate, a drain region, a word line, a gate structure, and a first bit line. The drain region is disposed on the substrate. The gate structure is disposed on the drain region and has a portion in the word line. The first bit line is disposed on the gate structure to serve as a source region.

Semiconductor structure having a gate structure portion in a word line

The stack capacitor structure includes a substrate, first, second, third, and fourth support layers, first, second, and third insulating layers, first, second, and third holes, and a capacitor. The first support layer is disposed over the substrate. The first insulating layer is disposed on the first support layer. The second support layer is disposed on the first insulating layer. The third support layer is disposed on the second support layer. The second insulating layer is disposed on the third support layer. The third insulating layer is disposed on the second insulating layer. The fourth support layer is disposed on the third insulating layer. The first hole penetrates through from the second support layer to the first support layer. The second and third holes penetrate through from the fourth support layer to the third support layer. The capacitor is disposed in the first, second, and third holes.

Stack capacitor structure and method for forming the same

A semiconductor device includes a substrate, a flowable dielectric material and a GaN-based semiconductor layer. The substrate has a pit exposed from an upper surface of the substrate, the flowable dielectric material fully fills the pit, and the GaN-based semiconductor layer is disposed over the substrate and the flowable dielectric material.

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Taipei, Taiwan

Szu-Yao Chang