Vanguard International Semiconductor Corporation

Syuan-Rong Huang

Yung-Cheng Chang

Chun-Fu Tung

Chien-Huei Yang

Hua-Ming Wang

A system for determining the cause of an abnormality in a semiconductor manufacturing process includes an abnormality mode determination module, a selection module, and a root cause analysis module. The abnormality mode determination module is used to determine the similarity between wafer bin maps containing the abnormal data. When the similarity among the wafer maps is higher than a reference value, the selection module executes the steps of: determining a bad lot based on the wafer maps where the similarity is higher than the reference value; determining a time span within which the bad lot is generated; selecting other bad lots occurring in the time span and satisfying a failure model; selecting a good lot based on a fixed lot interval. The root cause analysis module is used to execute the steps of calculating the correlation among data to obtain confidence indexes.

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Chiayi County, Taiwan

Syuan-Rong Huang