Renesas Electronics Corporation

Renesas Technology Corp.

Syouji Syukuri

Asao Nishimura

Toshio Miyamoto

Gorou Kitsukawa

In a semiconductor integrated circuit device, testing pads () using a conductive layer, such as relocation wiring layers () are provided just above or in the neighborhood of terminals like bonding pads () used only for probe inspection at which bump electrodes () are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.

Semiconductor integrated circuit device

Semiconductor integrated circuit device and manufacture thereof

Semiconductor integrated circuit device with a fuse circuit

Semiconductor integrated circuit device having particular testing pad arrangement

In a semiconductor integrated circuit device, testing pads ( ) using a conductive layer, such as relocation wiring layers ( ) are provided just above or in the neighborhood of terminals like bonding pads ( ) used only for probe inspection at which bump electrodes ( ) are not provided. Similar testing pads may be provided even with respect to terminals like bonding pads provided with bump electrodes. A probe test is executed by using these testing pads or under the combined use of under bump metallurgies antecedent to the formation of the bump electrodes together with the testing pads. According to the above, bump electrodes for pads dedicated for probe testing may not be added owing to the use of the testing pads. Further, the use of testing pads provided in the neighborhood of the terminals like the bonding pads and smaller in size than the under bump metallurgies enables a probe test to be executed after a relocation wiring process.

Semiconductor integrated circuit device having bump electrodes for signal or power only, and testing pads that are not coupled to bump electrodes

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Koganei, Japan

Syouji Syukuri