International Business Machines Corporation

Sylvie Spalmacin-Roma

Alain R Blanc

Patrick J Jeanniot

Christian Garcia

Yves Granger

Mohamed Badaoui

Richard Dambricourt

Jean-Paul Franquenouille

A scanning protocol is provided for the scanning of a plurality of serial transmission lines connecting users' devices to the scanning means of a communication device, said lines being coupled to the scanning means through line interface couplers (LICs) having each a wired address (n,n', . . . ) known to the scanning means. This scanning protocol requires that for each LIC configuration, a given LICn having a wired address n be re-addressable with a logical address n' corresponding to the wired address of any other active LICn'. This is done in order to determine, for said LIC configuration, the shortest possible scanning scheme including all the active LICs. The re-addressing of a LICn of wired address n, with a logical address n', includes the steps of: resetting the LICn to be affected a logical address n'; setting the logical address n' into LICn; locking said logical address n' into said LICn, and enabling the lines (26) connected to LICn re-addressed with logical address n'.

Protocol and apparatus for selectively scanning a plurality of lines

A multiprocessor system includes a plurality of signal processors and a common unit processor. Each of the signal processors is connected to a different source of signals such as voice signals and performs one or more signal processing functions relative to the connected source. The common unit processor performs one or more functions for the signal processors on a shared synchronized basis. A signal processor adapter responsive to a source of clock pulses generates synchronous interrupts applied to the common unit processor and enabling signals in sequence to connect the signal processor in sequence to the common unit processor in synchronization with the interrupts. In addition, the signal processors are provided with ping-pong buffers at their inputs and outputs to enhance throughput.

Multi-signal processor synchronized system

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Le Pecq, France

Sylvie Spalmacin-Roma