Stmicroelectronics (Crolles 2) Sas

Sylvie Del Medico

Philippe Brun

Jean-Philippe Reynard

Olivier Menut

Nicolas Planes

A method for manufacturing an interconnection structure for an integrated circuit is provided. The integrated circuit includes a first insulating layer, a second insulating layer, and a third insulating layer. Electrical contacts pass through the first insulating layer, and a component having an electrical contact region is located in the second insulating layer. The method includes etching a first opening in the third layer, vertically aligned with the contact region. A fourth insulating layer is deposited to fill in the opening, and a second opening is etched to the contact region by passing through the opening in the third insulating layer. A metal level is formed by filling in the second opening with a metal.

Interconnection structure of an integrated circuit

A semiconductor device includes a substrate of a first type of conductivity provided with at least one gate on one of its faces, and at least two doped regions of a second type of conductivity for forming a drain region and a source region. The two doped regions are arranged in the substrate flush with the face of the substrate on each side of a region of the substrate located under the gate for forming a channel between the drain and source regions. At least one region of doping agents of the second type of conductivity is implanted only in the channel.

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Saint-Hilaire, France

Sylvie Del Medico