Freescale Semiconductor,inc.

Syed R Rahman

Michael D Snyder

Klas Magnus Bruce

Gary L Whisenhunt

Kathryn C Stacer

Matt B Smittle

David F Greenberg

A method and device for locking a cache line of a cache is disclosed. The method includes automatically changing a state of a cache line from a valid locked state to an invalid locked state in response to receiving an indication that a memory location external to the cache and corresponding to the cache line is associated with an access request by a processor or other data access module. Thus, the locked state of a cache line is maintained even after data in the locked cache line is invalidated. By maintaining the invalid locked state, the cache line is not available for reallocation by the cache. This allows locked cache lines that become invalidated to remain locked without additional software overhead to periodically determine whether the lock has been lost due to invalidation of the cache line.

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Austin, TX, United States of America

Syed R Rahman