Tagore Technology, Inc.

Syed Asif Eqbal

Manish N Shah

Procheta Chatterjee

Subhendu Rana

Firdos Khan

Rajesh Ghosh

An electronic device includes a GaN power FET, a GaN driver coupled to the GaN power FET and a gate bias circuit coupled to the GaN driver. The GaN power FET and the GaN driver are monolithically integrated on a single GaN die. The gate bias circuit is predominately monolithically integrated on the single GaN die and includes only one active component external to the single GaN die. In one embodiment, the only active component external to the single GaN die is a linear regulator. In another embodiment, the only active component external to the single GaN die is a shunt regulator. In yet another embodiment, the only active component external to the single GaN die is a Zener diode.

Gate bias circuit for a driver monolithically integrated with a GAN power FET

An electronic circuit, integrated circuit, and method for a bias-less Miller clamp protection circuit, electrically coupled to an output of a driver circuit and to an input gate of a semiconductor switch device, for dynamically protecting the semiconductor switch device from turning from an off state to an on state in response to a parasitic Miller turn-on signal at the gate, regardless of the bias-less Miller clamp protection circuit having, or lacking, a power supply that provides electrical power to the bias-less Miller clamp protection circuit. The semiconductor switch device can include one or more GaN switch devices. The bias-less Miller clamp protection circuit does not consume any current during normal operation of the electronic circuit and also does not cause any interference to the normal operation.

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Patna, India

Syed Asif Eqbal