Pixart Imaging Incorporated

Pixart Imaging (penang) Sdn. Bhd.

Swee-Lin Thor

Kwai-Lee Pang

Gim-Eng Chew

Wooi-Kip Lim

Lee-Ling Teh

There is provided an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals from an amplifier and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Optical encoder with reduced comparators

Optical encoder with interpolation circuit

There is provided an interpolation circuit of an optical encoder including a phase shifter circuit, two multiplexers, two digital circuits and four comparators. The phase shifter circuit receives signals sequentially have a 90 degrees phase shift and outputs multiple phase shifted signals. Each of the two multiplexers receives a half of the multiple phase shifted signals and outputs two pairs of phase shifted signals, each pair having 180 degrees phase difference, respectively to two comparators connected thereto. Each of the two digital circuits controls the corresponding multiplexer to select the two pairs of phase shifted signals from the half of the multiple phase shifted signals.

Interpolation circuit of optical encoder

A pixel circuit including a photodiode, a first storage capacitor and a second storage capacitor is provided. The first storage capacitor discharges to a first output voltage in a first exposure time and to a third output voltage in a third exposure time. The second storage capacitor discharges to a second output voltage in a second exposure time and to a fourth output voltage in a fourth exposure time. The first and second exposure times are included in a first frame period. The third and fourth exposure times are included in a second frame period. The second frame period is a next frame period of the first frame period. In the first frame period, the first exposure time is subsequent to the second exposure time. In the second frame period, the third exposure time is prior to the fourth exposure time.

Operating method of pixel circuit and image system

Optical encoder and interpolation circuit and operating method thereof

Pixel circuit with low power consumption, image system including the same and operating method thereof

There is provided a BJT pixel circuit including a BJT transistor, a photodiode, a first storage capacitor and a second storage capacitor. The first storage capacitor is configured to discharge, via the BJT transistor, to a first output voltage in a first exposure time of the photodiode. The second storage capacitor is configured to discharge, via the BJT transistor, to a second output voltage in a second exposure time of the photodiode.

BJT pixel circuit capable of cancelling ambient light influence, image system including the same and operating method thereof

The present invention discloses an image processing method and an image processing system adopting the same. The method includes the steps of: (a) obtaining a pixel array representing an image; (b) segmenting the pixel array into two or more non-overlapping regions; (c) identifying a capacitor discharging rate of each of the regions; (d) generating a pulse width modulation (PWM) signal when a voltage level dropping of a capacitor exceeds a predetermined threshold; and (e) applying exposure parameters to the regions according to the capacitor discharging rate of the regions, respectively, wherein the exposure parameter applied to one of the regions is different from the exposure parameter applied to at least another one of the regions.

Image processing method and image processing system assigning different gains to different sections

An image pixel includes light nodes and a dark node. The dark node includes: a first charge storage unit for storing first power supply information during a first time period; a second charge storage unit for storing second power supply information related to the power supply during a second time period; and an information output unit for outputting a first sample signal related to the first power supply information or a second sample signal related to the second power supply information. The first power supply information remains in the first charge storage unit during the second time period and during when the second sample signal is outputted by the information output unit.

Growing community of inventors

Penang, Malaysia

Swee-Lin Thor