Abb Schweiz Ag

Abb Technology Ag

Swisssem Technologies Ag

Sven Matthias

Arnost Kopta

Chiara Corvasce

Wolfgang Janisch

Charalampos Papadopoulos

Atze De Vries

Raffael M Schnell

Chantal I T Toker

Power module has press-fit pins for the electrical and mechanical connection for the terminals, insertable into sleeves on the substrate. The substrate rests on a baseplate. Potential alignment frame ensures the accuracy of all elements. The mechanical and electrical connection of the power and signal terminals is realized by multiple (high-current) or single press-fit connections. When inserting the pins, they are fitting tightly in these sleeves by overcoming a frictional force and after fitting is established, for each single pin-fit, an electrical contact over a surface is established.

Power module and process for manufacturing the same

A method for manufacturing a vertical power semiconductor device is provided, wherein a first impurity is provided at the first main side of a semiconductor wafer. A first oxide layer is formed on the first main side of the wafer, wherein the first oxide layer is partially doped with a second impurity in such way that any first portion of the first oxide layer which is doped with the second impurity is spaced away from the semiconductor wafer by a second portion of the first oxide layer which is not doped with the second impurity and which is disposed between the first portion of the first oxide layer and the first main side of the semiconductor wafer. Thereafter a carrier wafer is bonded to the first oxide layer. During front-end-of-line processing on the second main side of the semiconductor wafer, the second impurity is diffused from the first oxide layer into the semiconductor wafer from its first main side by heat generated during the front-end-of-line processing.

Method for manufacturing a semiconductor device comprising a thin semiconductor wafer

The present application contemplates a method for manufacturing a power semiconductor device. The method comprises: providing a wafer of a first conductivity type, the wafer having a first main side and a second main side opposite to the first main side, and the wafer including an active cell area, which extends from the first main side to the second main side, in a central part of the wafer and a termination area surrounding the active cell area in an orthogonal projection onto a plane parallel to the first main side; forming a metallization layer on the first main side to electrically contact the wafer in the active cell area, wherein the surface of the metallization layer, which faces away from the wafer, defines a first plane parallel to the first main side; forming an isolation layer on the first main side in the termination area, wherein the surface of the isolation layer facing away from the wafer defines a second plane parallel to the first main side; after the step of forming the metallization layer and after the step of forming the isolation layer, mounting the wafer with its first main side to a flat surface of a chuck; and thereafter thinning the wafer from its second main side by grinding while pressing the second main side of the wafer onto a grinding wheel by applying a pressure between the chuck and the grinding wheel, wherein the first plane is further away from the wafer than a third plane, which is parallel to the second plane and arranged at a distance of 1 &#x3bc;m from the second plane in a direction towards the wafer.

Power semiconductor device with thick top-metal-design and method for manufacturing such power semiconductor device

A bipolar diode is provided having a drift layer of a first conductivity type on a cathode side and an anode layer of a second conductivity type on an anode side. The anode layer includes a diffused anode contact layer and a double diffused anode buffer layer. The anode contact layer is arranged up to a depth of at most 5 &#x3bc;m, and the anode buffer layer is arranged up to a depth of 18 to 25 &#x3bc;m. The anode buffer layer has a doping concentration between 8.0*10and 2.0*10cmin a depth of 5 &#x3bc;m and between 1.0*10up to 5.0*10cmin a depth of 15 &#x3bc;m (Split C and D), resulting in good softness of the device and low leakage current. Split A and B show anode layer doping concentrations of known diodes, which have either over all depths lower doping concentrations resulting in high leakage current or enhanced doping concentration resulting in bad softness.

Bipolar punch-through semiconductor device and method for manufacturing such a semiconductor device

A power semiconductor device, such as a power diode, and a method for producing such a device, are disclosed. The device includes a first layer of a first conductivity type, a second layer of a second conductivity type arranged in a central region on a first main side of the first layer, a third electrically conductive layer arranged on the second layer, and a fourth electrically conductive layer arranged on the first layer at a second main side opposite to the first main side. A junction termination region surrounds the second layer with self-contained sub-regions of the second conductivity type. A spacer region is arranged between the second layer and the junction termination region and includes a self-contained spacer sub-region of the second conductivity type which is electrically disconnected from the second layer. This spacer sub-region has a width for enabling a reliable alignment of a shadow mask during an ion implantation such that an implanted lifetime control region having carrier lifetime reducing defects may be restricted to a central area while no such defects are implanted into the junction termination region to improve electrical characteristics.

Growing community of inventors

Lenzburg, Switzerland

Sven Matthias