Vlsi Technology, Inc.

Suzanne Monsees

Calvin T Gabriel

Jie Zheng

A shallow trench isolation structure and method for forming such structure. In one embodiment, the semiconductor device isolating structure of the present invention includes a trench formed into a semiconductor substrate. A cross-section of the trench has a first sidewall sloping inwardly towards the center of a substantially planar bottom surface, and a second sidewall sloping inwardly towards the center of the substantially planar bottom surface. Additionally, a cross section of the trench has a first rounded bottom trench corner at an interface of the first sidewall and the substantially planar bottom surface, and a second rounded bottom trench corner at an interface of the second sidewall and the substantially planar bottom surface. Furthermore, the trench of the present invention has a first rounded upper trench corner at the interface of the first sidewall and the top surface of the semiconductor substrate, and a second rounded upper trench corner at the interface of the second sidewall and the top surface of the semiconductor substrate. Thus, the trench of the present invention does not have micro-trenches formed into the bottom surface thereof. Additionally, the present invention does not have the sharp upper and bottom corners found in conventional trenches formed using a shallow trench isolation method. The present invention also provides a method to eliminate deleterious micromasking and spike formation.

Method of manufacturing a trench structure in a semiconductor substrate

Sidewall profile

A shallow trench isolation structure and method for forming such structure. In one embodiment, the semiconductor device isolating structure of the present invention includes a trench formed into a semiconductor substrate. A cross-section of the trench has a first sidewall sloping inwardly towards the center of a substantially planar bottom surface, and a second sidewall sloping inwardly towards the center of the substantially planar bottom surface. Additionally, a cross section of the trench has a first rounded bottom trench corner at an interface of the first sidewall and the substantially planar bottom surface, and a second rounded bottom trench corner at an interface of the second sidewall and the substantially planar bottom surface. Furthermore, the trench of the present invention has a first rounded upper trench corner at the interface of the first sidewall and the top surface of the semiconductor substrate, and a second rounded upper trench corner at the interface of the second sidewall and the top surface of the semiconductor substrate. Thus, the trench of the present invention does not have micro-trenches formed into the bottom surface thereof Additionally, the present invention does not have the sharp upper and bottom comers found in conventional trenches formed using a shallow trench isolation method. The present invention also provides a method to eliminate deleterious micromasking and spike formation.

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Campbell, CA, United States of America

Suzanne Monsees