Intel Corporation

Sushil Subramanian

Stefano Pellerano

Todor Mladenov

Jong Seok Park

JongSeok Park

Bishnu Prasad Patra

Ravi Pillarisetty

Jeanette M Roberts

Hubert C George

Lester Lampert

Christopher Hull

Thomas Francis Watson

Shavindra Premaratne

Florian Luethi

Ilya Klochkov

Felix Frederic Leonhard Borjans

Simon Schaal

Apparatus and methods for interfacing an integrated qubit control chip and a solid state qubit; detecting a qubit state with a transition pulse histogram; high resolution and high speed rectangular pulse generation; large-scale spin qubit state readout; and activity-based clock control.

Quantum computing systems, apparatus, and methods

Quantum circuit assemblies that employ active pulse shaping in order to be able to control states of a plurality of qubits with signal pulses propagated over a shared signal propagation channel are disclosed. An example quantum circuit assembly includes a quantum circuit component that includes a first qubit, associated with a first frequency to control the state of the first qubit, and a second qubit, associated with a second frequency to control the state of the second qubit. A shared transmission channel is coupled to the first and second qubits. The assembly further includes a signal pulse generation circuit, configured to generate a signal pulse to be propagated over the shared transmission channel to control the state of the first qubit, where the signal pulse has a center frequency at the first frequency, a bandwidth that includes the second frequency, and a notch at the second frequency.

Scalable gate control in quantum circuit assemblies

An array of quantum dot qubits (e.g., an array of spin qubits) relies on a gradient magnetic field to ensure that the qubits are separated in frequency in order to be individually addressable. Furthermore, a strong magnetic field gradient is required to electrically drive the electric dipole spin resonance (EDSR) of the qubits. Quantum dot devices disclosed herein use microcoil arrangements for providing a gradient magnetic field, the microcoil arrangements integrated on the same chip (e.g., on the same die or wafer) as quantum dot qubits themselves. Unlike previous approaches to quantum dot formation and manipulation, various embodiments of the quantum dot devices disclosed herein may enable improved control over magnetic fields and their gradients to realize better frequency targeting of individual qubits, help minimize adverse effects of charge noise on qubit decoherence and provide good scalability in the number of quantum dots included in the device.

Quantum dot based qubit devices with on-chip microcoil arrangements

Technologies for the reduction of memory effects in a capacitor are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes an array of capacitors that can be charged to a voltage based on a voltage to be applied to a gate of the quantum processor. The capacitors in the array of capacitors are connected to the gate one at a time, charging up a parasitic capacitance. As more capacitors are switched, the voltage on the gate approaches a target voltage with an exponentially-decreasing voltage error.

Technologies for reduction of memory effects in a capacitor for qubit gate control

Technologies for a high-voltage transmission gate are disclosed. In the illustrative embodiment, a companion chip is connected to a quantum processor. The companion chip provides voltages to gates of qubits on the quantum processor. The companion chip includes one or more high-voltage transmission gates that can be used to charge capacitors linked to gates of qubits on the quantum processor. The transmission gate includes transistors with a breakdown voltage less than a range of input and output voltages of the transmission gate. Control circuitry on the companion chip controls the voltages applied to transistors of the transmission gate to ensure that the voltage differences across the terminals of each transistor is below a breakdown voltage.

Technologies for a high-voltage transmission gate

An example quantum circuit assembly includes a quantum circuit component with a plurality of qubits operable by selectively applying control signals to various terminals of the qubits. The assembly further includes an array of analog memory cells, a DAC configured to sequentially generate analog values/signals to be stored in different ones of the analog memory cells, and a switching arrangement configured to selectively apply control signals to various ones of qubit terminals, where each control signal is applied by the switching arrangement electrically connecting an output terminal of a different analog memory cell of the array of analog memory cells to one of the qubit terminals. Performing digital-to-analog conversion ahead of performing qubit operations and storing results of the conversion in different analog memory cells allows pre-generating and storing analog voltages required for qubit operations that may be carried out during the qubit coherence time.

Quantum circuit assembly with a digital-to-analog converter and an array of analog memory cells

Growing community of inventors

Hillsboro, OR, United States of America

Sushil Subramanian