Abb Research Ltd.

Asea Brown Boveri Ab

Acreo Ab

Susan Savage

Ulf Gustafsson

Christopher Ian Harris

Mietek Bakowski

Bo Bijlenga

Kurt Rottner

Mietek Bakowsky

Andrei Konstantinov

A field effect transistor of SiC for high temperature application has the source region layer (,), the drain region layer (,) and the channel region layer (,) vertically separated from a front surface (,), where a gate electrode (,) is arranged, for reducing the electric field at said surface in operation of the transistor and in the case of operation as a gas sensor permitting all electrodes except for the gate electrode to be protected from the atmosphere.

Field effect transistor of SiC for high temperature application, use of such a transistor and a method for production thereof

A semiconductor component and a method for processing said component, which comprises a pn junction, where both the p-conducting (3) and the n-conducting layers (2) of the pn junction constitute doped silicon carbide layers and where the edge of the higher doped conducting layer of the pn junction exhibits a charge profile with a stepwise or uniformly decreasing total charge or effective surface charge density from the initial value at the main pn junction to a zero or almost zero total charge or charge density at the outermost edge of the junction following a radial direction from the central part of the junction towards the outermost edge.

Fabrication of a SiC semiconductor device comprising a pn junction with

A semiconductor component including a silicon carbide substrate. A pn junction includes doped layers of the substrate. The pn junction includes at a surface of the substrate a low doped first conductivity type layer and at a portion of the surface of the substrate a highly doped second conductivity type layer. An edge termination region of the pn junction laterally surrounds the pn junction provided at an edge of at least one of the layers of the pn junction. The edge termination region includes zones of the second conductivity type located at an edge of the highly doped second conductivity type layer. A charge content of the zones decreases toward an edge of the edge termination region in accordance with at least one characteristic selected from the group consisting of a stepwise or continuously decreasing total charge towards an outer border of the edge termination region and a decreasing effective sheet charge density toward an outer border of the edge termination region. An outermost zone of the edge termination region is completely depleted at full design voltage.

SiC semiconductor device comprising a pn junction with a voltage

A semiconductor component, which comprises a pn junction, where both the p-conducting and the n-conducting layers of the pn junction constitute doped silicon carbide layers and where the edge of at least one of the conducting layers of the pn junction, exhibits a stepwise or uniformly decreasing total charge or effective surface charge density from the initial value at the defined working junction to a zero or almost zero total charge at the outermost edge of the junction following a radial direction from the central part of the junction towards the outermost edge.

SiC Semiconductor device comprising a pn Junction with a voltage

A semiconductor component comprises a pn junction in which both the p-conducting and the n-conducting layers of the pn junction are doped silicon carbide layers and the edge of at least one of the conducting layers of the pn junction exhibits a stepwise or uniformly decreasing total charge or effective surface charge density from the initial value at the defined working junction to a zero or almost zero total charge at the outermost edge of the junction following a radial direction from the central part of the junction towards its outermost edge.

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Jarfalla, Sweden

Susan Savage