Advanced Micro Devices Corporation

Susan G Kim

Paul Raymond Besser

Arvind Halliyal

Robert B Ogle

Paul L King

Kenneth W Au

The present invention is directed to a method of controlling polishing processes based upon x-ray fluorescence measurements. In one illustrative embodiment, the method comprises providing a wafer comprised of a layer of insulating material having a barrier metal layer formed thereabove and a layer of copper formed above the barrier metal layer, performing a chemical mechanical polishing operation to remove the barrier metal layer, irradiating at least one area of the wafer with x-rays, and analyzing x-rays leaving the irradiated area to determine the presence of material comprising the barrier metal layer.

Method of controlling barrier metal polishing processes based upon X-ray fluorescence measurements

The present invention is directed to a method of controlling the formation of metal layers. In one illustrative embodiment, the method comprises depositing a layer of metal above a structure, irradiating at least one area of the layer of metal, and analyzing an x-ray spectrum of x-rays leaving the irradiated area to determine a thickness of the layer of metal. In further embodiments of the present invention, a plurality of areas, and in some cases at least five areas, of the layer of metal are irradiated. The layer of metal may be comprised of, for example, titanium, cobalt, nickel, copper, tantalum, etc.

Method of controlling the formation of metal layers

A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device includes the formation of a nitrogenated top oxide layer. The process includes the sequential formation of a silicon nitride layer and a top oxide layer using an in-situ LPCVD or RTCVD deposition process in which the silicon nitride layer is not exposed to ambient atmosphere prior to the formation of the top oxide layer. After forming the top oxide layer, an annealing process is carried out to diffuse nitrogen into the top oxide layer. The formation of a nitrogenated top oxide layer provides an improved two-bit EEPROM memory device by reducing charge leakage in the ONO floating-gate electrode.

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Austin, TX, United States of America

Susan G Kim