Arm Limited

Surya Prakash Gupta

El Mehdi Boujamaa

Piyush Jain

Akshay Kumar

Cyrille Nicolas Dray

Various implementations described herein are directed to device having a memory block and a sense amplifier coupled to the memory block. The device may include a bias generator that applies a bias signal to the sense amplifier for regulating read current to the sense amplifier for faster activation of the memory block.

Bias generation circuitry

Various implementations described herein are directed to device having a clock generator that provides write reference signals. The device may include a voltage divider that receives the write reference signals and provides an output reference signal based on write polarity of the write reference signals. The device may include a voltage regulator that receives the output reference signal and provides a regulated voltage to a load based on the output reference signal.

Voltage regulation circuitry

Various implementations described herein refer to an integrated circuit having a sense amplifier that operates with a clock signal, and the sense amplifier may be biased with a bias signal that affects duration of the clock signal. The integrated circuit may include a delay circuit coupled to the sense amplifier, and the delay circuit may turn-off the clock signal. The delay circuit may have a current-starved delay stage that receives an input signal having a falling edge and provides a current-starved delay signal biased by the bias signal that also biases the sense amplifier.

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Noida, India

Surya Prakash Gupta