General Electric Company

Westinghouse Electric Corporation

Surinder Krishna

Douglas E Houston

Manuel L Torreno, Jr

Bantval J Baliga

Michael S Adler

Chang K Chu

B Jayant Baliga

Bruno F Kurz, Deceased

E Duane Wolley

Premature avalanche breakdown resulting from high electric fields produced by metal interconnections crossing underlying high conductivity regions of an integrated circuit is eliminated by selectively providing discontinuities in the high conductivity regions underlying the metal interconnection paths.

High voltage integrated circuits

A gate turn-off (IGTO) thyristor having short turn-off times and high di/dt and dV/dt capabilities comprises an insulating layer overlying the inner region of the n2-emitter (cathode) region which includes a central region of greater resistivity than the n2-emitter cathode region for reducing turn-off current density of the device. The addition of an insulating layer and a central region of increased resistivity to the central portions of a base region of a bipolar transistor provides similar improved performance characteristics.

Thyristor cathode and transistor emitter structures with insulator

A novel grid structure for a field controlled thyristor includes a current controlling grid structure interdigitated with a cathode structure in which the surface area of the cathode structure is substantially greater than that of the grid structure. High forward blocking voltage gain (anode voltage/grid voltage) and low on-state losses in a turn-off type field controlled thyristor are accomplished by providing a surface grid portion and a buried portion which are connected to the surface grid structure and substantially underlies the cathode structure. The buried grid structure is constructed in a manner to provide a high aspect ratio for the channel region.

Field controlled thyristor with buried grid

Geometrical design criteria are disclosed for a Gate Modulated BiPolar Transistor, or GAMBIT, which is a three terminal variable negative resistance device. The GAMBIT is a planar, interdigited, integrated device whose electrical characteristics show a voltage controlled negative resistance between two of its terminals. The magnitude of the negative resistance is controlled by the variation of the applied bias to the third terminal.

Gate modulated bipolar transistor

The minority carrier lifetime is drastically reduced in an integrated semiconductor power device by introducing deep level impurities such, for example, as gold, silver, platinum, nickel and copper into selected regions of the device by Thermal Gradient Zone Melting processing.

Current isolation means for integrated power devices

Deep level impurities such, for example, as gold, platinum, silver, nickel and copper, are introduced into selected regions of semiconductor devices by directional solidification to reduce the charge recombination lifetime and therefore the turn-off time of the device.

Spatial control of lifetime in semiconductor device

A homogeneous integrated power structure embodies solid state control or signal devices and power devices integrated monolithically to achieve optimum physical characteristics of each device embodied therein at economical cost of manufacturing the same. The devices are electrically isolated from each other by a P-N junction isolation grid produced by the thermomigration of metal-rich wires through a semiconductor substrate by thermal gradient zone melting processing techniques.

Semiconductor devices and method, including TGZM, of making same

A Gate Modulated BiPolar Transistor, or GAMBIT, is a three terminal negative resistance device. A load is connected between the emitter and collector terminals and the magnitude of the negative resistance is controlled by the voltage on the gate terminal. An increase in the output voltage modulates the resistance of the gate which decreases the output current.

A plasma thyristor circuit is provided for generating high power, ultra-short duration electrical signals. A silicon semiconductor body has first, second and third impurity regions therein with a PN junction formed at the transition between the first and second or the second and third impurity regions. The second impurity region has an impurity concentration of less than about 5 .times. 10.sup.14 atoms/cm.sup.3, and a width of greater than about 80 microns. The ratio of the punch-through voltage of the second impurity region to the reverse breakdown voltage of the PN junction is between 0.3 and 0.7. Power sources apply both a reverse bias voltage across the body greater than said punch-through voltage and less than said reverse breakdown voltage, and a current to the body having a density greater than the saturation current density of the second impurity region.

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Ballston Lake, NY, United States of America

Surinder Krishna