Sun Microsystems, Inc.

Suresh Seshadri

Dennis L Wendell

Raymond A Heald

David Hugh McIntyre

Pradeep Kaushik

Gurupada Mandal

William Y Mo

An improved circuit for sensing and programming fuses in integrated circuits. The circuit is broadly comprised of a fuse cell, a reference circuit, a sense amplifier and a level detector. In one embodiment of the present invention, a two-stage sensing scheme is implemented. The improved fuse sensing circuit uses current-mode sensing and implements an auto-read current reduction scheme. Using a level-detect circuit, the virtual ground is raised automatically if the high-voltage power supply exceeds core supply (Vdd) by a fixed dc voltage. This reduces effective sensing voltage and the read current and thus helps preserve unblown fuse integrity. In one embodiment of the invention, four modes of operation are implemented: 'Normal Read,' 'Unblown_Read,' &#x201c;Blown_Read_1&#x201d; and &#x201c;Blown_Read_2.&#x201d; The default read mode is the &#x201c;normal read&#x201d; while the &#x201c;Unblown&#x201d; and &#x201c;Blown&#x201d; read modes are for fuse calibration purposes. In the &#x201c;Unblown_Read&#x201d; read mode, the circuit is operable to compare the fuse resistance against a lower reference resistance, closer to an unblown fuse resistance value, in order to make the comparison more stringent. Similarly, the &#x201c;Blown_Read_1&#x201d; and &#x201c;Blown_Read_2&#x201d; modes allow a more stringent comparison for a blown fuse resistance.

Fuse sensing scheme with auto current reduction

An apparatus and method for controlling and providing off-pitch shifting circuitry for implementing column redundancy in a multiple-array memory is described in connection with an on-board cache memory integrated with a microprocessor. Depending upon the particular sub-array being accessed, shift position data is provided to a shared, off-pitch shift circuit to control the read and/or write operations for the memory. A register bank stores data identifying the defective columns which is compared to the incoming address information to detect any matches. In response to a match, control information is provided to the off-pitch shift circuit for shifting or re-routing the incoming data to a non-defective address in the memory. In this way, defective columns located in different positions in each sub-array can be replaced by redundant paths, thereby repairing the cache and increasing the manufacturing yield of microprocessors with an on-board cache memory.

Off-pitch column redundancy using dynamic shifters

Growing community of inventors

Mountain View, CA, United States of America

Suresh Seshadri